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Message-ID: <20170811120714.rwr24ewr4mjzwznn@hirez.programming.kicks-ass.net>
Date:   Fri, 11 Aug 2017 14:07:14 +0200
From:   Peter Zijlstra <peterz@...radead.org>
To:     Andrew Cooper <andrew.cooper3@...rix.com>
Cc:     Vitaly Kuznetsov <vkuznets@...hat.com>,
        Juergen Gross <jgross@...e.com>,
        Stephen Hemminger <sthemmin@...rosoft.com>,
        boris.ostrovsky@...cle.com,
        "linux-tip-commits@...r.kernel.org" 
        <linux-tip-commits@...r.kernel.org>,
        Jork Loeser <Jork.Loeser@...rosoft.com>,
        Haiyang Zhang <haiyangz@...rosoft.com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "rostedt@...dmis.org" <rostedt@...dmis.org>,
        Simon Xiao <sixiao@...rosoft.com>,
        "andy.shevchenko@...il.com" <andy.shevchenko@...il.com>,
        "luto@...nel.org" <luto@...nel.org>,
        "hpa@...or.com" <hpa@...or.com>, xen-devel@...ts.xenproject.org,
        "tglx@...utronix.de" <tglx@...utronix.de>,
        KY Srinivasan <kys@...rosoft.com>,
        "torvalds@...ux-foundation.org" <torvalds@...ux-foundation.org>,
        "mingo@...nel.org" <mingo@...nel.org>
Subject: Re: [Xen-devel] [tip:x86/platform] x86/hyper-v: Use hypercall for
 remote TLB flush

On Fri, Aug 11, 2017 at 12:05:45PM +0100, Andrew Cooper wrote:
> >> Oh, I see your concern. Hyper-V, however, is not the first x86
> >> hypervisor trying to avoid IPIs on remote TLB flush, Xen does this
> >> too. Briefly looking at xen_flush_tlb_others() I don't see anything
> >> special, do we know how serialization is achieved there?
> > No idea on how Xen works, I always just hope it goes away :-) But lets
> > ask some Xen folks.
> 
> How is the software pagewalker relying on IF being clear safe at all (on
> native, let alone under virtualisation)?  Hardware has no architectural
> requirement to keep entries in the TLB.

No, but it _can_, therefore when we unhook pages we _must_ invalidate.

It goes like:

	CPU0			CPU1

	unhook page
				cli
				traverse page tables
	TLB invalidate --->	<IF clear, therefore CPU0 waits>
				sti
				<IPI>
				 TLB invalidate
			<------	 complete
				</IPI>
	free page

So the CPU1 page-table walker gets an existence guarantee of the
page-tables by clearing IF.

> In the virtualisation case, at any point the vcpu can be scheduled on a
> different pcpu even during a critical region like that, so the TLB
> really can empty itself under your feet.

Not the point.

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