[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <1502459130-6234-3-git-send-email-eric.auger@redhat.com>
Date: Fri, 11 Aug 2017 15:45:28 +0200
From: Eric Auger <eric.auger@...hat.com>
To: eric.auger.pro@...il.com, eric.auger@...hat.com,
iommu@...ts.linux-foundation.org, linux-kernel@...r.kernel.org,
Will.Deacon@....com, robin.murphy@....com,
Jean-Philippe.Brucker@....com
Cc: christoffer.dall@...aro.org, Marc.Zyngier@....com,
alex.williamson@...hat.com, peterx@...hat.com, mst@...hat.com,
tn@...ihalf.com, bharat.bhushan@....com
Subject: [RFC v2 2/4] iommu/arm-smmu-v3: Add tlbi_on_map option
When running a virtual SMMU on a guest we sometimes need to trap
all changes to the translation structures. This is especially useful
to integrate with VFIO. This patch adds a new option that forces
the IO_PGTABLE_QUIRK_TLBI_ON_MAP to be applied on LPAE page tables.
TLBI commands then can be trapped.
Signed-off-by: Eric Auger <eric.auger@...hat.com>
---
v1 -> v2:
- rebase on v4.13-rc2
---
Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt | 4 ++++
drivers/iommu/arm-smmu-v3.c | 5 +++++
2 files changed, 9 insertions(+)
diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt b/Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt
index c9abbf3..ebb85e9 100644
--- a/Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt
+++ b/Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt
@@ -52,6 +52,10 @@ the PCIe specification.
devicetree/bindings/interrupt-controller/msi.txt
for a description of the msi-parent property.
+- tlbi-on-map : invalidate caches whenever there is an update of
+ any remapping structure (updates to not-present or
+ present entries).
+
- hisilicon,broken-prefetch-cmd
: Avoid sending CMD_PREFETCH_* commands to the SMMU.
diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c
index 568c400..690247b 100644
--- a/drivers/iommu/arm-smmu-v3.c
+++ b/drivers/iommu/arm-smmu-v3.c
@@ -608,6 +608,7 @@ struct arm_smmu_device {
#define ARM_SMMU_OPT_SKIP_PREFETCH (1 << 0)
#define ARM_SMMU_OPT_PAGE0_REGS_ONLY (1 << 1)
+#define ARM_SMMU_OPT_TLBI_ON_MAP (1 << 2)
u32 options;
struct arm_smmu_cmdq cmdq;
@@ -675,6 +676,7 @@ struct arm_smmu_option_prop {
static struct arm_smmu_option_prop arm_smmu_options[] = {
{ ARM_SMMU_OPT_SKIP_PREFETCH, "hisilicon,broken-prefetch-cmd" },
{ ARM_SMMU_OPT_PAGE0_REGS_ONLY, "cavium,cn9900-broken-page1-regspace"},
+ { ARM_SMMU_OPT_TLBI_ON_MAP, "tlbi-on-map" },
{ 0, NULL},
};
@@ -1604,6 +1606,9 @@ static int arm_smmu_domain_finalise(struct iommu_domain *domain)
if (smmu->features & ARM_SMMU_FEAT_COHERENCY)
pgtbl_cfg.quirks = IO_PGTABLE_QUIRK_NO_DMA;
+ if (smmu->options & ARM_SMMU_OPT_TLBI_ON_MAP)
+ pgtbl_cfg.quirks = IO_PGTABLE_QUIRK_TLBI_ON_MAP;
+
pgtbl_ops = alloc_io_pgtable_ops(fmt, &pgtbl_cfg, smmu_domain);
if (!pgtbl_ops)
return -ENOMEM;
--
2.5.5
Powered by blists - more mailing lists