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Message-ID: <20170816122423.315817c7@kitsune.suse.cz>
Date:   Wed, 16 Aug 2017 12:24:23 +0200
From:   Michal Suchánek <msuchanek@...e.de>
To:     Ken Goldman <kgold@...ux.vnet.ibm.com>
Cc:     linux-ima-devel@...ts.sourceforge.net,
        linux-security-module@...r.kernel.org,
        tpmdd-devel@...ts.sourceforge.net, linux-kernel@...r.kernel.org
Subject: Re: [tpmdd-devel] [PATCH] tpm: improve tpm_tis send() performance
 by ignoring burstcount

On Tue, 15 Aug 2017 18:02:57 -0400
Ken Goldman <kgold@...ux.vnet.ibm.com> wrote:

> On 8/13/2017 7:53 PM, msuchanek wrote:
> > About 500 out of 700 mainboards sold today has a PS/2 port which is
> > probably due to prevalence of legacy devices and usbhid limitations.
> > 
> > Similarily many boards have serial and parallel hardware ports.
> > 
> > In all diagrams detailed enough to show these ports I have seen them
> > attached to the LPC bus.  
> 
> Do these boards have a TPM?  Remember that the TPM requires special
> LPC bus cycles.

Out of nearly 700 boards over 500 have PS/2 connector and over 400
have TPM slot (which is subset of the PS/2 enabled boards). Some more
possibly have on-board TPM chip.

> 
> Even if so, the TPM LPC bus wait states are less than a usec.  My 
> thought is that  it's unlikely that any device (serial port, mouse, 
> keyboard, printer) will be adversely affected.

Yes, in theory this is negligible. So unless there is a possibility
these wait states chain or the device otherwise takes over the bus for
extended period of time this should be fine.

Thanks

Michal

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