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Message-ID: <20170817220056.q572ix5kzjawf2gf@rob-hp-laptop>
Date: Thu, 17 Aug 2017 17:00:56 -0500
From: Rob Herring <robh@...nel.org>
To: Vignesh R <vigneshr@...com>
Cc: Marek Vasut <marek.vasut@...il.com>,
Cyrille Pitchen <cyrille.pitchen@...ev4u.fr>,
David Woodhouse <dwmw2@...radead.org>,
Brian Norris <computersforpeace@...il.com>,
Boris Brezillon <boris.brezillon@...e-electrons.com>,
Richard Weinberger <richard@....at>,
linux-mtd@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH v2 3/5] mtd: spi-nor: cadence-quadspi: Add new binding to
enable loop-back circuit
On Wed, Aug 16, 2017 at 10:20:51AM +0530, Vignesh R wrote:
> Cadence QSPI IP has a adapted loop-back circuit which can be enabled by
> setting BYPASS field to 0 in READCAPTURE register. It enables use of
> QSPI return clock to latch the data rather than the internal QSPI
> reference clock. For high speed operations, adapted loop-back circuit
> using QSPI return clock helps to increase data valid window.
>
> Add DT parameter cdns,rclk-en to help enable adapted loop-back circuit
> for boards which do have QSPI return clock provided. Update binding
> documentation for the same.
>
> Signed-off-by: Vignesh R <vigneshr@...com>
> ---
> Documentation/devicetree/bindings/mtd/cadence-quadspi.txt | 3 +++
> 1 file changed, 3 insertions(+)
Acked-by: Rob Herring <robh@...nel.org>
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