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Message-ID: <20170817090908.GP20805@n2100.armlinux.org.uk>
Date: Thu, 17 Aug 2017 10:09:08 +0100
From: Russell King - ARM Linux <linux@...linux.org.uk>
To: Linus Walleij <linus.walleij@...aro.org>
Cc: Danilo Krummrich <danilokrummrich@...develop.de>,
Will Deacon <will.deacon@....com>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Linux Input <linux-input@...r.kernel.org>,
Dmitry Torokhov <dmitry.torokhov@...il.com>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>
Subject: Re: [PATCH] serio: PS2 gpio bit banging driver for the serio bus
On Fri, Aug 11, 2017 at 11:16:20AM +0200, Linus Walleij wrote:
> writel() should be guaranteeing that the values hit the hardware, wmb() is
> spelled out "write memory barrier" I don't see what you're after here.
Incorrect. writel() has a barrier which ensures that data written to
memory (eg, dma coherent memory) is visible to the hardware prior to
the write hitting the hardware.
There is no barrier to ensure that the write hits the hardware in a
timely manner - the write can be buffered by the buses, which will
delay it before it hits its destination.
PCI particularly buffers MMIO writes, and the requirement there has
always been that if you need the write to hit the hardware in a timely
fashion, you must perform a read-back to force the bus to deliver the
write (since a read is not allowed to overlap a write.)
The solution is never to use barrier() - barrier() is a _compiler_
barrier and does nothing for posted writes on hardware buses.
--
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