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Message-Id: <20170818083925.10108-1-marc.zyngier@arm.com>
Date: Fri, 18 Aug 2017 09:39:13 +0100
From: Marc Zyngier <marc.zyngier@....com>
To: Thomas Gleixner <tglx@...utronix.de>
Cc: Wei Xu <xuwei5@...ilicon.com>,
James Hogan <james.hogan@...tec.com>,
Jason Cooper <jason@...edaemon.net>,
Andrew Lunn <andrew@...n.ch>,
Gregory Clement <gregory.clement@...e-electrons.com>,
Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>,
Kevin Cernekee <cernekee@...il.com>,
Florian Fainelli <f.fainelli@...il.com>,
Chris Zankel <chris@...kel.net>,
Max Filippov <jcmvbkbc@...il.com>,
Paul Burton <paul.burton@...tec.com>,
Matt Redfearn <matt.redfearn@...tec.com>,
linux-kernel@...r.kernel.org
Subject: [PATCH v2 00/12] genirq/irqchip: Effective affinity fixups
4.13 contains a number of updates to the core IRQ code to deal with
things like the effective affinity. This series attempts to fix a
number of small things that are now breaking:
1) The core code assumes that CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK
being defined implies that *all* interrupts have an effective
affinity, while it may not be the case (I may have compiled in an
irqchip driver that has this property, yet none of my interrupts are
routed through it).
2) A large number of our irqchips are effectively single target (they
will pick one CPU in the affinity list), and yet do not update the
effective affinity cpumask.
(1) is solved by checking that the interrupt has a non-empty effective
affinity mask when reporting it, and use the notional affinity mask
instead if the effective one is empty.
(2) is just a matter of updating the effective affinity when required,
and to mark the interrupts as "single target". I've kept them separate
so that people can directly pick the irqchip they are interested in,
but these 10 patches could as well be squashed into a single one.
I've lightly tested the ARM GIC stuff, and that's it. I'd appreciate
some feedback from the platform maintainers, specially for the more
exotic architectures such as metag and xtensa.
Thanks,
M.
* From v1:
- Don't assume that an interrupt not being single-target means that
it doesn't use the effective affinity, and check the full mask
instead (Thomas Gleixner)
- Fix MIPS GIC patch, where the affinity registered was the notional
one instead of the effective one (Paul Burton)
Marc Zyngier (12):
genirq: Restrict effective affinity to interrupts actually using it
genirq/proc: Use the the accessor to report the effective affinity
irqchip/gic: Report that effective affinity is a single target
irqchip/gic-v3: Report that effective affinity is a single target
irqchip/gic-v3-its: Report that effective affinity is a single target
irqchip/armada-370-xp: Report that effective affinity is a single
target
irqchip/bcm-6345-l1: Report that effective affinity is a single target
irqchip/bcm-7038-l1: Report that effective affinity is a single target
irqchip/metag-ext: Report that effective affinity is a single target
irqchip/hip04: Report that effective affinity is a single target
irqchip/mips-gic: Report that effective affinity is a single target
irqchip/xtensa-mx: Report that effective affinity is a single target
arch/arm/mach-hisi/Kconfig | 1 +
arch/metag/Kconfig | 1 +
drivers/irqchip/Kconfig | 7 +++++++
drivers/irqchip/irq-armada-370-xp.c | 3 +++
drivers/irqchip/irq-bcm6345-l1.c | 3 +++
drivers/irqchip/irq-bcm7038-l1.c | 3 +++
drivers/irqchip/irq-gic-v3-its.c | 7 ++++++-
drivers/irqchip/irq-gic-v3.c | 3 +++
drivers/irqchip/irq-gic.c | 3 +++
drivers/irqchip/irq-hip04.c | 3 +++
drivers/irqchip/irq-metag-ext.c | 4 ++++
drivers/irqchip/irq-mips-gic.c | 10 +++++++---
drivers/irqchip/irq-xtensa-mx.c | 6 +++++-
include/linux/irq.h | 5 ++++-
kernel/irq/proc.c | 2 +-
15 files changed, 54 insertions(+), 7 deletions(-)
--
2.11.0
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