linux-kernel - Re: [PATCH 3/3] soc: xilinx: zynqmp: Add firmware interface

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <bd650766-cb2b-2bd6-e7ec-d1b045fe6cf5@xilinx.com>
Date:   Fri, 18 Aug 2017 14:14:55 +0200
From:   Michal Simek <michal.simek@...inx.com>
To:     Arnd Bergmann <arnd@...db.de>,
        Michal Simek <michal.simek@...inx.com>
CC:     Linux ARM <linux-arm-kernel@...ts.infradead.org>,
        Sören Brinkmann <soren.brinkmann@...inx.com>,
        Lucas Stach <l.stach@...gutronix.de>,
        Michal Simek <monstr@...str.eu>, yangbo lu <yangbo.lu@....com>,
        Andreas Färber <afaerber@...e.de>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        Alexandre Belloni <alexandre.belloni@...e-electrons.com>,
        Baoyou Xie <baoyou.xie@...aro.org>,
        Shawn Guo <shawnguo@...nel.org>,
        Geert Uytterhoeven <geert+renesas@...der.be>,
        Nicolas Ferre <nicolas.ferre@...rochip.com>,
        Simon Horman <horms+renesas@...ge.net.au>
Subject: Re: [PATCH 3/3] soc: xilinx: zynqmp: Add firmware interface

On 17.8.2017 23:11, Arnd Bergmann wrote:
> On Thu, Aug 17, 2017 at 12:48 PM, Michal Simek <michal.simek@...inx.com> wrote:
>> On 16.8.2017 17:05, Arnd Bergmann wrote:
>>> On Wed, Aug 16, 2017 at 4:34 PM, Michal Simek <michal.simek@...inx.com> wrote:
>>>
>>> Looks good, just make sure you also check with sparse (make C=1)
>>> to ensure you have the right __le64/__le32 types everywhere.
>>
>> Are you aware about any doc where it is written that data should be
>> passed as little endian?
> 
> Looking at http://infocenter.arm.com/help/topic/com.arm.doc.den0028b/ARM_DEN0028B_SMC_Calling_Convention.pdf
> now, I think that the structure above is endian-neutral as the arguments
> get passed in registers rather than memory.
> 
> However, if you pass pointers to data structures in memory, those
> data structures would have to be defined with __le32/__le64 types.

ok.

> 
>> I was playing with it a little bit and this means that these 2(3 with
>> hvc) needs to be changed.
>>
>> asmlinkage void __arm_smccc_smc(__le64 a0, __le64 a1, __le64 a2,
>>  __le64 a3,__le64 a4, __le64 a5, __le64 a6, __le64 a7,
>> struct arm_smccc_res *res, struct arm_smccc_quirk *quirk);
>>
>>  struct arm_smccc_res {
>> -       unsigned long a0;
>> -       unsigned long a1;
>> -       unsigned long a2;
>> -       unsigned long a3;
>> +       __le64 a0;
>> +       __le64 a1;
>> +       __le64 a2;
>> +       __le64 a3;
>>  };
> 
> This is clearly wrong on 32-bit machines, I think this is intentionally
> defined as 'unsigned long' to have register sized arguments.

Yep, I know.

Let me integrate that changes which Marc wanted and will send next version.

Thanks,
Michal