linux-kernel - [tip:x86/mm] x86/CPU: Align CR3 defines

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Message-ID: <tip-d6c8103b0265d8db30e20e948a4f06382bbdaea7@git.kernel.org>
Date:   Mon, 21 Aug 2017 02:39:47 -0700
From:   tip-bot for Borislav Petkov <tipbot@...or.com>
To:     linux-tip-commits@...r.kernel.org
Cc:     tglx@...utronix.de, luto@...nel.org, linux-kernel@...r.kernel.org,
        torvalds@...ux-foundation.org, mingo@...nel.org, bp@...e.de,
        peterz@...radead.org, hpa@...or.com, thomas.lendacky@....com
Subject: [tip:x86/mm] x86/CPU: Align CR3 defines

Commit-ID:  d6c8103b0265d8db30e20e948a4f06382bbdaea7
Gitweb:     http://git.kernel.org/tip/d6c8103b0265d8db30e20e948a4f06382bbdaea7
Author:     Borislav Petkov <bp@...e.de>
AuthorDate: Mon, 21 Aug 2017 10:06:51 +0200
Committer:  Ingo Molnar <mingo@...nel.org>
CommitDate: Mon, 21 Aug 2017 11:35:50 +0200

x86/CPU: Align CR3 defines

Align them vertically for better readability and use BIT_ULL() macro.

No functionality change.

Signed-off-by: Borislav Petkov <bp@...e.de>
Cc: Andy Lutomirski <luto@...nel.org>
Cc: Linus Torvalds <torvalds@...ux-foundation.org>
Cc: Peter Zijlstra <peterz@...radead.org>
Cc: Thomas Gleixner <tglx@...utronix.de>
Cc: Tom Lendacky <thomas.lendacky@....com>
Link: http://lkml.kernel.org/r/20170821080651.4527-1-bp@alien8.de
Signed-off-by: Ingo Molnar <mingo@...nel.org>
---
 arch/x86/include/asm/processor-flags.h | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/x86/include/asm/processor-flags.h b/arch/x86/include/asm/processor-flags.h
index 8a6d89f..dc723b6 100644
--- a/arch/x86/include/asm/processor-flags.h
+++ b/arch/x86/include/asm/processor-flags.h
@@ -34,17 +34,17 @@
  */
 #ifdef CONFIG_X86_64
 /* Mask off the address space ID and SME encryption bits. */
-#define CR3_ADDR_MASK __sme_clr(0x7FFFFFFFFFFFF000ull)
-#define CR3_PCID_MASK 0xFFFull
-#define CR3_NOFLUSH (1UL << 63)
+#define CR3_ADDR_MASK	__sme_clr(0x7FFFFFFFFFFFF000ull)
+#define CR3_PCID_MASK	0xFFFull
+#define CR3_NOFLUSH	BIT_ULL(63)
 #else
 /*
  * CR3_ADDR_MASK needs at least bits 31:5 set on PAE systems, and we save
  * a tiny bit of code size by setting all the bits.
  */
-#define CR3_ADDR_MASK 0xFFFFFFFFull
-#define CR3_PCID_MASK 0ull
-#define CR3_NOFLUSH 0
+#define CR3_ADDR_MASK	0xFFFFFFFFull
+#define CR3_PCID_MASK	0ull
+#define CR3_NOFLUSH	0
 #endif
 
 #endif /* _ASM_X86_PROCESSOR_FLAGS_H */