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Message-ID: <3808559.a1EKnBSiS9@phil>
Date: Tue, 22 Aug 2017 02:56:44 +0200
From: Heiko Stuebner <heiko@...ech.de>
To: Elaine Zhang <zhangqing@...k-chips.com>
Cc: mturquette@...libre.com, sboyd@...eaurora.org, robh+dt@...nel.org,
mark.rutland@....com, devicetree@...r.kernel.org,
linux-clk@...r.kernel.org, linux-rockchip@...ts.infradead.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
xxx@...k-chips.com, xf@...k-chips.com, huangtao@...k-chips.com,
cl@...k-chips.com, andy.yan@...k-chips.com, wdc@...k-chips.com
Subject: Re: [PATCH v2 4/4] clk: rockchip: rv1108: fix up the clk_mac sel register description
Am Montag, 21. August 2017, 16:16:07 CEST schrieb Elaine Zhang:
> cru_sel24_con[8]
> rmii_extclk_sel
> clock source select control register
> 1'b0: from internal PLL
> 1'b1: from external IO
>
> Signed-off-by: Elaine Zhang <zhangqing@...k-chips.com>
applied for 4.14.
Thanks
Heiko
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