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Message-ID: <c0b4ff19-b9b9-13bf-72da-f6f747bc6003@wedev4u.fr>
Date:   Tue, 22 Aug 2017 18:14:31 +0200
From:   Cyrille Pitchen <cyrille.pitchen@...ev4u.fr>
To:     Claudiu Beznea <claudiu.beznea@...rochip.com>,
        marek.vasut@...il.com, dwmw2@...radead.org,
        computersforpeace@...il.com, boris.brezillon@...e-electrons.com,
        richard@....at
Cc:     linux-mtd@...ts.infradead.org, linux-kernel@...r.kernel.org,
        nicolas.ferre@...rochip.com
Subject: Re: [PATCH v2] mtd: spi-nor: add support for Microchip sst26vf064b
 QSPI memory

Le 22/08/2017 à 11:51, Claudiu Beznea a écrit :
> Add support for Microchip sst26vf064b QSPI memory.
> 
> Signed-off-by: Claudiu Beznea <claudiu.beznea@...rochip.com>

Applied to the spi-nor/next branch of l2-mtd

Thanks!
> ---
> Changes since v1:
> - use 64K sector size; changing the sector size the number of sectors
> was changed to 128
> 
>  drivers/mtd/spi-nor/spi-nor.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
> index 196b52f..09515be 100644
> --- a/drivers/mtd/spi-nor/spi-nor.c
> +++ b/drivers/mtd/spi-nor/spi-nor.c
> @@ -1081,6 +1081,7 @@ static const struct flash_info spi_nor_ids[] = {
>  	{ "sst25wf040b", INFO(0x621613, 0, 64 * 1024,  8, SECT_4K) },
>  	{ "sst25wf040",  INFO(0xbf2504, 0, 64 * 1024,  8, SECT_4K | SST_WRITE) },
>  	{ "sst25wf080",  INFO(0xbf2505, 0, 64 * 1024, 16, SECT_4K | SST_WRITE) },
> +	{ "sst26vf064b", INFO(0xbf2643, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
>  
>  	/* ST Microelectronics -- newer production may have feature updates */
>  	{ "m25p05",  INFO(0x202010,  0,  32 * 1024,   2, 0) },
> 

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