lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Date:   Thu, 24 Aug 2017 13:41:27 -0700
From:   Jim Mattson <jmattson@...gle.com>
To:     Paolo Bonzini <pbonzini@...hat.com>
Cc:     LKML <linux-kernel@...r.kernel.org>, kvm list <kvm@...r.kernel.org>
Subject: Re: [PATCH v8 4/4] kvm: vmx: Raise #UD on unsupported XSAVES/XRSTORS

Reviewed-by: Jim Mattson <jmattson@...gle.com>

On Thu, Aug 24, 2017 at 9:09 AM, Paolo Bonzini <pbonzini@...hat.com> wrote:
> A guest may not be configured to support XSAVES/XRSTORS, even when the host
> does. If the guest does not support XSAVES/XRSTORS, clear the secondary
> execution control so that the processor will raise #UD.
>
> Also clear the "allowed-1" bit for XSAVES/XRSTORS exiting in the
> IA32_VMX_PROCBASED_CTLS2 MSR, and pass through VMCS12's control in
> the VMCS02.
>
> Signed-off-by: Paolo Bonzini <pbonzini@...hat.com>
> ---
>  arch/x86/kvm/vmx.c | 26 ++++++++++++++++++++++----
>  1 file changed, 22 insertions(+), 4 deletions(-)
>
> diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
> index 954e26079cd6..08bfeb8c32ea 100644
> --- a/arch/x86/kvm/vmx.c
> +++ b/arch/x86/kvm/vmx.c
> @@ -1358,8 +1358,7 @@ static inline int nested_cpu_has_ept(struct vmcs12 *vmcs12)
>
>  static inline bool nested_cpu_has_xsaves(struct vmcs12 *vmcs12)
>  {
> -       return nested_cpu_has2(vmcs12, SECONDARY_EXEC_XSAVES) &&
> -               vmx_xsaves_supported();
> +       return nested_cpu_has2(vmcs12, SECONDARY_EXEC_XSAVES);
>  }
>
>  static inline bool nested_cpu_has_pml(struct vmcs12 *vmcs12)
> @@ -2823,8 +2822,7 @@ static void nested_vmx_setup_ctls_msrs(struct vcpu_vmx *vmx)
>                 SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE |
>                 SECONDARY_EXEC_APIC_REGISTER_VIRT |
>                 SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY |
> -               SECONDARY_EXEC_WBINVD_EXITING |
> -               SECONDARY_EXEC_XSAVES;
> +               SECONDARY_EXEC_WBINVD_EXITING;
>
>         if (enable_ept) {
>                 /* nested EPT: emulate EPT also to L1 */
> @@ -5319,6 +5317,25 @@ static void vmx_compute_secondary_exec_control(struct vcpu_vmx *vmx)
>         if (!enable_pml)
>                 exec_control &= ~SECONDARY_EXEC_ENABLE_PML;
>
> +       if (vmx_xsaves_supported()) {
> +               /* Exposing XSAVES only when XSAVE is exposed */
> +               bool xsaves_enabled =
> +                       guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) &&
> +                       guest_cpuid_has(vcpu, X86_FEATURE_XSAVES);
> +
> +               if (!xsaves_enabled)
> +                       exec_control &= ~SECONDARY_EXEC_XSAVES;
> +
> +               if (nested) {
> +                       if (xsaves_enabled)
> +                               vmx->nested.nested_vmx_secondary_ctls_high |=
> +                                       SECONDARY_EXEC_XSAVES;
> +                       else
> +                               vmx->nested.nested_vmx_secondary_ctls_high &=
> +                                       ~SECONDARY_EXEC_XSAVES;
> +               }
> +       }
> +
>         if (vmx_rdtscp_supported()) {
>                 bool rdtscp_enabled = guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP);
>                 if (!rdtscp_enabled)
> @@ -10421,6 +10438,7 @@ static int prepare_vmcs02(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12,
>                 exec_control &= ~(SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES |
>                                   SECONDARY_EXEC_ENABLE_INVPCID |
>                                   SECONDARY_EXEC_RDTSCP |
> +                                 SECONDARY_EXEC_XSAVES |
>                                   SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY |
>                                   SECONDARY_EXEC_APIC_REGISTER_VIRT |
>                                   SECONDARY_EXEC_ENABLE_VMFUNC);
> --
> 1.8.3.1
>

Powered by blists - more mailing lists