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Message-Id: <20170827213659.29210-1-mathieu.desnoyers@efficios.com>
Date: Sun, 27 Aug 2017 14:36:59 -0700
From: Mathieu Desnoyers <mathieu.desnoyers@...icios.com>
To: "Paul E . McKenney" <paulmck@...ux.vnet.ibm.com>
Cc: linux-kernel@...r.kernel.org,
Mathieu Desnoyers <mathieu.desnoyers@...icios.com>,
Peter Zijlstra <peterz@...radead.org>,
Chris Zankel <chris@...kel.net>,
Max Filippov <jcmvbkbc@...il.com>,
linux-xtensa@...ux-xtensa.org
Subject: [PATCH] Fix: xtensa: add missing sync_core
The membarrier system call now requires all architectures to implement
sync_core(). On Xtensa, it is provided by the EXTW instruction.
[ Completely untested! Can someone on the xtensa side confirm whether
EXTW is the right way to serialize core execution and try it out ? ]
Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@...icios.com>
CC: Peter Zijlstra <peterz@...radead.org>
CC: Paul E. McKenney <paulmck@...ux.vnet.ibm.com>
CC: Chris Zankel <chris@...kel.net>
CC: Max Filippov <jcmvbkbc@...il.com>
CC: linux-xtensa@...ux-xtensa.org
---
arch/xtensa/include/asm/processor.h | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/xtensa/include/asm/processor.h b/arch/xtensa/include/asm/processor.h
index 30ee8c608853..b435bd6adbd6 100644
--- a/arch/xtensa/include/asm/processor.h
+++ b/arch/xtensa/include/asm/processor.h
@@ -248,5 +248,14 @@ static inline unsigned long get_er(unsigned long addr)
#endif /* XCHAL_HAVE_EXTERN_REGS */
+static inline void sync_core(void)
+{
+ /*
+ * Synchronize the core execution pipeline. Acts as a compiler
+ * barrier.
+ */
+ asm volatile ("extw" : : : "memory");
+}
+
#endif /* __ASSEMBLY__ */
#endif /* _XTENSA_PROCESSOR_H */
--
2.11.0
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