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Date: Mon, 28 Aug 2017 12:53:44 +0200 From: Andreas Färber <afaerber@...e.de> To: Thomas Gleixner <tglx@...utronix.de>, Jason Cooper <jason@...edaemon.net>, Marc Zyngier <marc.zyngier@....com>, linux-arm-kernel@...ts.infradead.org Cc: linux-kernel@...r.kernel.org, Roc He <hepeng@...oo.tv>, 蒋丽琴 <jiang.liqin@...iatech.com>, Andreas Färber <afaerber@...e.de>, Rob Herring <robh+dt@...nel.org>, Mark Rutland <mark.rutland@....com>, Catalin Marinas <catalin.marinas@....com>, Will Deacon <will.deacon@....com>, devicetree@...r.kernel.org Subject: [PATCH v2 3/3] arm64: dts: realtek: Add irq mux to RTD1295 Update UART nodes with interrupts. Signed-off-by: Andreas Färber <afaerber@...e.de> --- v1 -> v2: * Rebased arch/arm64/boot/dts/realtek/rtd1295.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/arch/arm64/boot/dts/realtek/rtd1295.dtsi b/arch/arm64/boot/dts/realtek/rtd1295.dtsi index c8b7bb642a9a..6918373e9b5c 100644 --- a/arch/arm64/boot/dts/realtek/rtd1295.dtsi +++ b/arch/arm64/boot/dts/realtek/rtd1295.dtsi @@ -93,21 +93,41 @@ /* Exclude up to 2 GiB of RAM */ ranges = <0x80000000 0x80000000 0x80000000>; + iso_irq_mux: interrupt-controller@...07000 { + compatible = "realtek,rtd1295-iso-irq-mux"; + reg = <0x98007000 0x100>; + interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; + interrupt-controller; + #interrupt-cells = <1>; + }; + uart0: serial@...07800 { compatible = "snps,dw-apb-uart"; reg = <0x98007800 0x400>; reg-shift = <2>; reg-io-width = <4>; clock-frequency = <27000000>; + interrupt-parent = <&iso_irq_mux>; + interrupts = <2>; status = "disabled"; }; + irq_mux: interrupt-controller@...1b000 { + compatible = "realtek,rtd1295-irq-mux"; + reg = <0x9801b000 0x100>; + interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; + interrupt-controller; + #interrupt-cells = <1>; + }; + uart1: serial@...1b200 { compatible = "snps,dw-apb-uart"; reg = <0x9801b200 0x100>; reg-shift = <2>; reg-io-width = <4>; clock-frequency = <432000000>; + interrupt-parent = <&irq_mux>; + interrupts = <3>, <5>; status = "disabled"; }; @@ -117,6 +137,8 @@ reg-shift = <2>; reg-io-width = <4>; clock-frequency = <432000000>; + interrupt-parent = <&irq_mux>; + interrupts = <8>, <13>; status = "disabled"; }; -- 2.12.3
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