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Message-ID: <tip-12c15302dd4b768105d4b7a487ed4858ccab94fc@git.kernel.org>
Date:   Tue, 29 Aug 2017 14:19:54 -0700
From:   tip-bot for Jiri Olsa <tipbot@...or.com>
To:     linux-tip-commits@...r.kernel.org
Cc:     linux-kernel@...r.kernel.org, hpa@...or.com, dsahern@...il.com,
        namhyung@...nel.org, a.p.zijlstra@...llo.nl, ak@...ux.intel.com,
        jolsa@...nel.org, mingo@...nel.org, acme@...hat.com,
        alexander.shishkin@...ux.intel.com, tglx@...utronix.de,
        jmario@...hat.com
Subject: [tip:perf/core] perf c2c: Fix remote HITM detection for Skylake

Commit-ID:  12c15302dd4b768105d4b7a487ed4858ccab94fc
Gitweb:     http://git.kernel.org/tip/12c15302dd4b768105d4b7a487ed4858ccab94fc
Author:     Jiri Olsa <jolsa@...nel.org>
AuthorDate: Thu, 24 Aug 2017 10:57:32 +0200
Committer:  Arnaldo Carvalho de Melo <acme@...hat.com>
CommitDate: Mon, 28 Aug 2017 11:05:10 -0300

perf c2c: Fix remote HITM detection for Skylake

Skylake introduced new mem_remote bit in union perf_mem_data_src [1].
It applies to any other memory level to express Remote unknown level, as
is reported by Skylake.

Adding this extra check to c2c_decode_stats to properly decode remote
HITMs on Skylake.

[1] http://lkml.kernel.org/r/20170816222156.19953-4-andi@firstfloor.org

Signed-off-by: Jiri Olsa <jolsa@...nel.org>
Acked-by: Andi Kleen <ak@...ux.intel.com>
Cc: Alexander Shishkin <alexander.shishkin@...ux.intel.com>
Cc: David Ahern <dsahern@...il.com>
Cc: Joe Mario <jmario@...hat.com>
Cc: Namhyung Kim <namhyung@...nel.org>
Cc: Peter Zijlstra <a.p.zijlstra@...llo.nl>
Link: http://lkml.kernel.org/r/20170824085732.28481-1-jolsa@kernel.org
Signed-off-by: Arnaldo Carvalho de Melo <acme@...hat.com>
---
 tools/perf/util/mem-events.c | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/tools/perf/util/mem-events.c b/tools/perf/util/mem-events.c
index ced4f3f..28afe5f 100644
--- a/tools/perf/util/mem-events.c
+++ b/tools/perf/util/mem-events.c
@@ -316,6 +316,11 @@ int c2c_decode_stats(struct c2c_stats *stats, struct mem_info *mi)
 	u64 lvl    = data_src->mem_lvl;
 	u64 snoop  = data_src->mem_snoop;
 	u64 lock   = data_src->mem_lock;
+	/*
+	 * Skylake might report unknown remote level via this
+	 * bit, consider it when evaluating remote HITMs.
+	 */
+	bool mrem  = data_src->mem_remote;
 	int err = 0;
 
 #define HITM_INC(__f)		\
@@ -361,7 +366,8 @@ do {				\
 			}
 
 			if ((lvl & P(LVL, REM_RAM1)) ||
-			    (lvl & P(LVL, REM_RAM2))) {
+			    (lvl & P(LVL, REM_RAM2)) ||
+			     mrem) {
 				stats->rmt_dram++;
 				if (snoop & P(SNOOP, HIT))
 					stats->ld_shared++;
@@ -371,7 +377,8 @@ do {				\
 		}
 
 		if ((lvl & P(LVL, REM_CCE1)) ||
-		    (lvl & P(LVL, REM_CCE2))) {
+		    (lvl & P(LVL, REM_CCE2)) ||
+		     mrem) {
 			if (snoop & P(SNOOP, HIT))
 				stats->rmt_hit++;
 			else if (snoop & P(SNOOP, HITM))

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