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Message-Id: <1504231306-4450-1-git-send-email-zhangqing@rock-chips.com>
Date:   Fri,  1 Sep 2017 10:01:43 +0800
From:   Elaine Zhang <zhangqing@...k-chips.com>
To:     mturquette@...libre.com, sboyd@...eaurora.org, heiko@...ech.de
Cc:     linux-clk@...r.kernel.org, linux-rockchip@...ts.infradead.org,
        linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        xxx@...k-chips.com, xf@...k-chips.com, huangtao@...k-chips.com,
        cl@...k-chips.com, Elaine Zhang <zhangqing@...k-chips.com>
Subject: [PATCH v1 0/3] clk: rockchip: rk3128: fix up some clks

Elaine Zhang (3):
  clk: rockchip: rk3128: add pclk_pmu as critical clock
  clk: rockchip: rk3128: fix up pvtm and mipi_24m gate regs description
    error
  clk: rockchip: rk3126: add sclk_timer5 as critical clock

 drivers/clk/rockchip/clk-rk3128.c | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

-- 
1.9.1


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