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Message-ID: <20170901225520.GG21656@codeaurora.org>
Date:   Fri, 1 Sep 2017 15:55:20 -0700
From:   Stephen Boyd <sboyd@...eaurora.org>
To:     Quentin Schulz <quentin.schulz@...e-electrons.com>
Cc:     mturquette@...libre.com, robh+dt@...nel.org, mark.rutland@....com,
        lgirdwood@...il.com, broonie@...nel.org,
        nicolas.ferre@...rochip.com, alexandre.belloni@...e-electrons.com,
        linux@...linux.org.uk, boris.brezillon@...e-electrons.com,
        perex@...ex.cz, tiwai@...e.com, linux-clk@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        alsa-devel@...a-project.org, linux-arm-kernel@...ts.infradead.org,
        cyrille.pitchen@...ev4u.fr, thomas.petazzoni@...e-electrons.com
Subject: Re: [PATCH v5 5/7] clk: at91: clk-generated: make gclk determine
 audio_pll rate

On 08/10, Quentin Schulz wrote:
> This allows gclk to determine audio_pll rate and set the parent rate
> accordingly.
> 
> However, there are multiple children clocks that could technically
> change the rate of audio_pll (via gck). With the rate locking, the first
> consumer to enable the clock will be the one definitely setting the rate
> of the clock.
> 
> Since audio IPs are most likely to request the same rate, we enforce
> that the only clks able to modify gck rate are those of audio IPs.
> 
> To remain consistent, we deny other clocks to be children of audio_pll.
> 
> Signed-off-by: Quentin Schulz <quentin.schulz@...e-electrons.com>
> Acked-by: Boris Brezillon <boris.brezillon@...e-electrons.com>
> Acked-by: Nicolas Ferre <nicolas.ferre@...rochip.com>
> ---

Applied to clk-next

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

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