linux-kernel - Re: [PATCH V3 8/8] drivers: boot_constraint: Add Qualcomm display controller constraints

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20170904162544.GA21849@amd>
Date:   Mon, 4 Sep 2017 18:25:44 +0200
From:   Pavel Machek <pavel@....cz>
To:     Viresh Kumar <viresh.kumar@...aro.org>
Cc:     Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Vincent Guittot <vincent.guittot@...aro.org>,
        Mark Brown <broonie@...nel.org>,
        Stephen Boyd <sboyd@...eaurora.org>,
        Rajendra Nayak <rnayak@...eaurora.org>,
        Shiraz Hashim <shashim@...eaurora.org>,
        linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        robdclark@...il.com
Subject: Re: [PATCH V3 8/8] drivers: boot_constraint: Add Qualcomm display
 controller constraints

Hi!

> From: Rajendra Nayak <rnayak@...eaurora.org>
> 
> NOT TO BE MERGED
> 
> This sets boot constraints for the display controller used on Qualcomm
> dragonboard 410c.
> 
> Not-signed-off-by: Rajendra Nayak <rnayak@...eaurora.org>
> Not-signed-off-by: Viresh Kumar <viresh.kumar@...aro.org>

> +#include <linux/boot_constraint.h>
> +#include <linux/init.h>
> +#include <linux/kernel.h>
> +
> +struct dev_boot_constraint_clk_info iface_clk_info = {
> +	.name = "iface_clk",
> +};
> +
> +struct dev_boot_constraint_clk_info bus_clk_info = {
> +	.name = "bus_clk",
> +};
> +
> +struct dev_boot_constraint_clk_info core_clk_info = {
> +	.name = "core_clk",
> +};
> +
> +struct dev_boot_constraint_clk_info vsync_clk_info = {
> +	.name = "vsync_clk",
> +};
> +
> +struct dev_boot_constraint_clk_info esc0_clk_info = {
> +	.name = "core_clk",
> +};
> +
> +struct dev_boot_constraint_clk_info byte_clk_info = {
> +	.name = "byte_clk",
> +};
> +
> +struct dev_boot_constraint_clk_info pixel_clk_info = {
> +	.name = "pixel_clk",
> +};
> +
> +struct dev_boot_constraint_supply_info vdda_info = {
> +	.name = "vdda"
> +};
> +
> +struct dev_boot_constraint_supply_info vddio_info = {
> +	.name = "vddio"
> +};
> +
> +struct dev_boot_constraint constraints_mdss[] = {
> +	{
> +		.type = DEV_BOOT_CONSTRAINT_PM,
> +		.data = NULL,
> +	},
> +};
> +
> +struct dev_boot_constraint constraints_mdp[] = {
> +	{
> +		.type = DEV_BOOT_CONSTRAINT_CLK,
> +		.data = &iface_clk_info,
> +	}, {
> +		.type = DEV_BOOT_CONSTRAINT_CLK,
> +		.data = &bus_clk_info,
> +	}, {
> +		.type = DEV_BOOT_CONSTRAINT_CLK,
> +		.data = &core_clk_info,
> +	}, {
> +		.type = DEV_BOOT_CONSTRAINT_CLK,
> +		.data = &vsync_clk_info,
> +	},
> +};

Hmm. I know this is not for merge, but should this go to device tree somewhere?


-- 
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html

Download attachment "signature.asc" of type "application/pgp-signature" (182 bytes)