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Message-Id: <20170905084306.19318-4-mperttunen@nvidia.com>
Date:   Tue,  5 Sep 2017 11:43:03 +0300
From:   Mikko Perttunen <mperttunen@...dia.com>
To:     thierry.reding@...il.com, jonathanh@...dia.com, robh+dt@...nel.org,
        mark.rutland@....com
Cc:     digetx@...il.com, amerilainen@...dia.com, dnibade@...dia.com,
        sgurrappadi@...dia.com, dri-devel@...ts.freedesktop.org,
        devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-tegra@...r.kernel.org, linux-kernel@...r.kernel.org,
        Mikko Perttunen <mperttunen@...dia.com>
Subject: [PATCH v2 3/6] arm64: tegra: Add VIC on Tegra186

Add a node for the Video Image Compositor on the Tegra186.

Signed-off-by: Mikko Perttunen <mperttunen@...dia.com>
---
v2:
- Fixed reg property in accordance with changed parent cells.

 arch/arm64/boot/dts/nvidia/tegra186.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
index b1a3e404c7be..584bce64d41f 100644
--- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
@@ -371,6 +371,18 @@
 		#size-cells = <1>;
 
 		ranges = <0x15000000 0x0 0x15000000 0x01000000>;
+
+		vic@...40000 {
+			compatible = "nvidia,tegra186-vic";
+			reg = <0x15340000 0x40000>;
+			interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&bpmp TEGRA186_CLK_VIC>;
+			clock-names = "vic";
+			resets = <&bpmp TEGRA186_RESET_VIC>;
+			reset-names = "vic";
+
+			power-domains = <&bpmp TEGRA186_POWER_DOMAIN_VIC>;
+		};
 	};
 
 	gpu@...00000 {
-- 
2.14.1

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