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Date:   Thu, 7 Sep 2017 17:30:37 +0100
From:   Jean-Philippe Brucker <jean-philippe.brucker@....com>
To:     Bob Liu <liubo95@...wei.com>, Yisheng Xie <xieyisheng1@...wei.com>
Cc:     joro@...tes.org, robh+dt@...nel.org, mark.rutland@....com,
        lorenzo.pieralisi@....com, hanjun.guo@...aro.org,
        sudeep.holla@....com, rjw@...ysocki.net, lenb@...nel.org,
        will.deacon@....com, robin.murphy@....com, robert.moore@...el.com,
        lv.zheng@...el.com, iommu@...ts.linux-foundation.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-acpi@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        devel@...ica.org, chenjiankang1@...wei.com, xieyisheng@...wei.com
Subject: Re: [RFC PATCH 0/6] Add platform device SVM support for ARM SMMUv3

On 07/09/17 02:55, Bob Liu wrote:
> Speak to the invalidation, I have one more question.
> 
> There is a time window between 1) modify page table;  2) tlb invalidate;
> 
> ARM-CPU                           Device
> 
> 1. modify page table
> 
>                              ^^^^^
>                               Can still write data through smmu tlb even page table was already modified.
>                               (At this point, the same virtual addr may not point to the same thing for CPU and device!!!
>                                I'm afraid there may be some data-loss or other potential problems if this situation happens.)
> 
> 2. tlb invalidate range

The mm code serializes map/unmap operations with mm->mmap_sem, and at a
lower level I think the pte lock is used to prevent more subtle races.
Don't take my word for it though, mm/ is still very obscure to me. So the
kernel shouldn't be able to reuse the VA for something else before the tlb
invalidation completes. Even if you're using the CMDQ to invalidate
instead of TLBI instructions, you're still called by a notifier from the
mm code so there is no problem.

Thanks,
Jean

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