lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20170908143710.rhz6x3i776zrhbzo@flea.lan>
Date:   Fri, 8 Sep 2017 16:37:10 +0200
From:   Maxime Ripard <maxime.ripard@...e-electrons.com>
To:     Brüns, Stefan <Stefan.Bruens@...h-aachen.de>
Cc:     "linux-sunxi@...glegroups.com" <linux-sunxi@...glegroups.com>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "dmaengine@...r.kernel.org" <dmaengine@...r.kernel.org>,
        Vinod Koul <vinod.koul@...el.com>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Chen-Yu Tsai <wens@...e.org>, Rob Herring <robh+dt@...nel.org>,
        Code Kipper <codekipper@...il.com>,
        Andre Przywara <andre.przywara@....com>
Subject: Re: [PATCH 05/10] dmaengine: sun6i: Move number of
 pchans/vchans/request to device struct

On Mon, Sep 04, 2017 at 02:30:59PM +0000, Brüns, Stefan wrote:
> On Montag, 4. September 2017 09:43:55 CEST Maxime Ripard wrote:
> > On Mon, Sep 04, 2017 at 12:40:56AM +0200, Stefan Brüns wrote:
> > > Preparatory patch: If the same compatible is used for different SoCs which
> > > have a common register layout, but different number of channels, the
> > > channel count can no longer be stored in the config. Store it in the
> > > device structure instead.
> > > 
> > > Signed-off-by: Stefan Brüns <stefan.bruens@...h-aachen.de>
> > 
> > As stated already, we already are going to have a different
> > compatible, and this is not something that will change from one
> > instance to the other. Having code is therefore:
> >   A) Making the code more complex
> >   B) For no particular reason.
> 
> If the dma channel count (which is a standard dma binding, likely for a 
> reason) goes into the devicetree, it has to be moved out of the config.
>
> The R40 (which has register manuals available) has the same register layout as 
> the A64, but *does* have a different channel count. So you think it is a good 
> idea to introduce a new compatible again?
> 
> If you had been half as picky when merging the H3 and A83T support, we would 
> not have this mess now.
> 
> There is also the H6, where there is no register manual available yet, but I  
> bet it has the H3 (and A64, H5, R40) register layout, but unlikely the same 
> number of DMA channels *and* the same number of ports.

The thing is that this kind of things usually grow organically until
you can't just add a simple if case any more.

I'm sorry you were at the tipping point, but I'm sure you also
understand that adding more to the mess until the next one shows up
isn't viable either.

That being said, thinking a bit more on that one, if you add to the
binding that we need to have both the current SoC compatible (to
workaround any variation / bugs we might encounter in the future) and
the "generation" one (to avoid adding one for each new IP), plus the
mandatory dma-channels / dma-requests properties, that would work for
me.

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

Download attachment "signature.asc" of type "application/pgp-signature" (802 bytes)

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ