linux-kernel - [PATCH 2/3] perf/x86/msr: add missing CPU IDs

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Message-Id: <20170908213449.6224-2-kan.liang@intel.com>
Date:   Fri,  8 Sep 2017 17:34:48 -0400
From:   kan.liang@...el.com
To:     tglx@...utronix.de, peterz@...radead.org, mingo@...hat.com,
        linux-kernel@...r.kernel.org
Cc:     harry.pan@...el.com, srinivas.pandruvada@...ux.intel.com,
        piotr.luc@...el.com, ak@...ux.intel.com,
        Kan Liang <Kan.liang@...el.com>
Subject: [PATCH 2/3] perf/x86/msr: add missing CPU IDs

From: Kan Liang <Kan.liang@...el.com>

Goldmont, Glodmont plus and Xeon Phi have MSR_SMI_COUNT as well.

Signed-off-by: Kan Liang <Kan.liang@...el.com>
---
 arch/x86/events/msr.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/x86/events/msr.c b/arch/x86/events/msr.c
index 4bb3ec6..0672367 100644
--- a/arch/x86/events/msr.c
+++ b/arch/x86/events/msr.c
@@ -63,6 +63,14 @@ static bool test_intel(int idx)
 	case INTEL_FAM6_ATOM_SILVERMONT1:
 	case INTEL_FAM6_ATOM_SILVERMONT2:
 	case INTEL_FAM6_ATOM_AIRMONT:
+
+	case INTEL_FAM6_ATOM_GOLDMONT:
+	case INTEL_FAM6_ATOM_DENVERTON:
+
+	case INTEL_FAM6_ATOM_GEMINI_LAKE:
+
+	case INTEL_FAM6_XEON_PHI_KNL:
+	case INTEL_FAM6_XEON_PHI_KNM:
 		if (idx == PERF_MSR_SMI)
 			return true;
 		break;
-- 
2.9.4