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Date:   Wed, 13 Sep 2017 15:52:14 +0800
From:   gengdongjiu <gengdongjiu@...wei.com>
To:     Peter Maydell <peter.maydell@...aro.org>, <james.morse@....com>
CC:     "Michael S. Tsirkin" <mst@...hat.com>,
        Igor Mammedov <imammedo@...hat.com>,
        Zhaoshenglong <zhaoshenglong@...wei.com>,
        "Paolo Bonzini" <pbonzini@...hat.com>,
        QEMU Developers <qemu-devel@...gnu.org>,
        qemu-arm <qemu-arm@...gnu.org>, kvm-devel <kvm@...r.kernel.org>,
        "edk2-devel@...ts.01.org" <edk2-devel@...ts.01.org>,
        Christoffer Dall <christoffer.dall@...aro.org>,
        Marc Zyngier <marc.zyngier@....com>,
        "Will Deacon" <will.deacon@....com>,
        James Morse <james.morse@....com>,
        Tyler Baicar <tbaicar@...eaurora.org>,
        Ard Biesheuvel <ard.biesheuvel@...aro.org>,
        "Ingo Molnar" <mingo@...nel.org>, "bp@...e.de" <bp@...e.de>,
        Shiju Jose <shiju.jose@...wei.com>,
        "zjzhang@...eaurora.org" <zjzhang@...eaurora.org>,
        arm-mail-list <linux-arm-kernel@...ts.infradead.org>,
        "kvmarm@...ts.cs.columbia.edu" <kvmarm@...ts.cs.columbia.edu>,
        "lkml - Kernel Mailing List" <linux-kernel@...r.kernel.org>,
        "linux-acpi@...r.kernel.org" <linux-acpi@...r.kernel.org>,
        "devel@...ica.org" <devel@...ica.org>,
        "John Garry" <john.garry@...wei.com>,
        Jonathan Cameron <jonathan.cameron@...wei.com>,
        Shameerali Kolothum Thodi 
        <shameerali.kolothum.thodi@...wei.com>,
        huangdaode <huangdaode@...ilicon.com>,
        "Wangzhou (B)" <wangzhou1@...ilicon.com>,
        Huangshaoyu <huangshaoyu@...wei.com>,
        Wuquanming <wuquanming@...wei.com>,
        Linuxarm <linuxarm@...wei.com>,
        "Zhengqiang (turing)" <zhengqiang10@...wei.com>
Subject: Re: [PATCH v11 6/6] target-arm: kvm64: Handle SError interrupt for
 the guest OS



On 2017/9/12 0:39, Peter Maydell wrote:
>>>> +    return  kvm_vcpu_ioctl(CPU(cpu), KVM_ARM_SEI, &syndrome);
>>> This looks odd. If we don't have the RAS extension why do we need to do anything at all here ?
>> This is because Qemu may need to support non-RAS extension as discussed with ARM James before.
>> That is to say host hardware CPU does not support RAS, but guest supports.
>> That is under discussion.
>> When host hardware supports RAS, specify the syndrome to a valid value, otherwise, set it to 0.
> If the guest CPU doesn't support the RAS extension then we have
> no mechanism for delivering it a notification about the
> memory problem at all, so setting the syndrome to anything
> doesn't make sense.
> 
> I'm not sure what you should do in the case of "host
> supports telling us about a memory problem and has
> done so, but guest does not support being told about it",
> but I'm pretty sure it shouldn't be this.
Hi peter,
   thanks for the comments.

   in short, if the hardware CPU does not support RAS extension, do you think whether the Qemu or guest OS
needs to support RAS(generate APEI table / record CPER / Error recovery).

CC James,

Hi James,
  you ever have below comments:

-----------------------------------------------------------------------
But you can use APEI in a guest on CPUs without the RAS extensions: the host may
signal memory errors to Qemu for any number of reasons.
------------------------------------------------------------------

in fact, I have a concern about it. If CPU without the RAS extension, the host should not deliver the sigbus.
in which case in your test that host still deliver sigbus without RAS?

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