linux-kernel - Re: [patches] Re: [PATCH v8 11/18] RISC-V: Atomic and Locking Code

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [day] [month] [year] [list]

Message-ID: <mhng-31437315-8417-4331-8a57-da9e3c16c517@palmer-si-x1c4>
Date:   Wed, 13 Sep 2017 10:01:46 -0700 (PDT)
From:   Palmer Dabbelt <palmer@...belt.com>
To:     Arnd Bergmann <arnd@...db.de>
CC:     peterz@...radead.org, tglx@...utronix.de, jason@...edaemon.net,
        marc.zyngier@....com, dmitriy@...-tech.org,
        yamada.masahiro@...ionext.com, mmarek@...e.com, albert@...ive.com,
        will.deacon@....com, boqun.feng@...il.com, oleg@...hat.com,
        mingo@...hat.com, daniel.lezcano@...aro.org,
        gregkh@...uxfoundation.org, jslaby@...e.com, davem@...emloft.net,
        mchehab@...nel.org, hverkuil@...all.nl, rdunlap@...radead.org,
        viro@...iv.linux.org.uk, mhiramat@...nel.org, fweisbec@...il.com,
        mcgrof@...nel.org, dledford@...hat.com, bart.vanassche@...disk.com,
        sstabellini@...nel.org, mpe@...erman.id.au,
        rmk+kernel@...linux.org.uk, paul.gortmaker@...driver.com,
        nicolas.dichtel@...nd.com, linux@...ck-us.net,
        heiko.carstens@...ibm.com, schwidefsky@...ibm.com,
        geert@...ux-m68k.org, akpm@...ux-foundation.org,
        andriy.shevchenko@...ux.intel.com, jiri@...lanox.com,
        vgupta@...opsys.com, airlied@...hat.com, jk@...abs.org,
        chris@...is-wilson.co.uk, Jason@...c4.com,
        paulmck@...ux.vnet.ibm.com, ncardwell@...gle.com,
        linux-kernel@...r.kernel.org, linux-kbuild@...r.kernel.org,
        patches@...ups.riscv.org
Subject:     Re: [patches] Re: [PATCH v8 11/18] RISC-V: Atomic and Locking Code

On Wed, 13 Sep 2017 08:28:30 PDT (-0700), Arnd Bergmann wrote:
> On Tue, Sep 12, 2017 at 11:57 PM, Palmer Dabbelt <palmer@...belt.com> wrote:
>> This contains all the code that directly interfaces with the RISC-V
>> memory model.  While this code corforms to the current RISC-V ISA
>> specifications (user 2.2 and priv 1.10), the memory model is somewhat
>> underspecified in those documents.  There is a working group that hopes
>> to produce a formal memory model by the end of the year, but my
>> understanding is that the basic definitions we're relying on here won't
>> change significantly.
>>
>> Signed-off-by: Palmer Dabbelt <palmer@...belt.com>
>
> I've read through the current definition of the I/O accessors again, as we
> discussed those before, and this version looks good to me. I've also
> looked briefly at the other helpers in this patch and found nothing
> surprising in there, so feel free to add
>
> Reviewed-by: Arnd Bergmann <arnd@...db.de>
>
> to the patch.

Thanks for all your time!