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Message-Id: <1505375812-19037-3-git-send-email-benjamin.gaignard@linaro.org> Date: Thu, 14 Sep 2017 09:56:52 +0200 From: Benjamin Gaignard <benjamin.gaignard@...aro.org> To: robh+dt@...nel.org, mark.rutland@....com, linux@...linux.org.uk, mcoquelin.stm32@...il.com, alexandre.torgue@...com, daniel.lezcano@...aro.org, tglx@...utronix.de, ludovic.barre@...com Cc: devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org, Benjamin Gaignard <benjamin.gaignard@...aro.org> Subject: [PATCH 2/2] arm: dts: stm32: remove useless clocksource nodes 16 bits timers aren't accurate enough to be used as clocksource, remove them from stm32f4 and stm32f7 devicetree. Signed-off-by: Benjamin Gaignard <benjamin.gaignard@...aro.org> --- arch/arm/boot/dts/stm32f429.dtsi | 32 -------------------------------- arch/arm/boot/dts/stm32f746.dtsi | 32 -------------------------------- 2 files changed, 64 deletions(-) diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi index a8113dc..fd211cb 100644 --- a/arch/arm/boot/dts/stm32f429.dtsi +++ b/arch/arm/boot/dts/stm32f429.dtsi @@ -108,14 +108,6 @@ }; }; - timer3: timer@...00400 { - compatible = "st,stm32-timer"; - reg = <0x40000400 0x400>; - interrupts = <29>; - clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM3)>; - status = "disabled"; - }; - timers3: timers@...00400 { #address-cells = <1>; #size-cells = <0>; @@ -137,14 +129,6 @@ }; }; - timer4: timer@...00800 { - compatible = "st,stm32-timer"; - reg = <0x40000800 0x400>; - interrupts = <30>; - clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM4)>; - status = "disabled"; - }; - timers4: timers@...00800 { #address-cells = <1>; #size-cells = <0>; @@ -194,14 +178,6 @@ }; }; - timer6: timer@...01000 { - compatible = "st,stm32-timer"; - reg = <0x40001000 0x400>; - interrupts = <54>; - clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM6)>; - status = "disabled"; - }; - timers6: timers@...01000 { #address-cells = <1>; #size-cells = <0>; @@ -218,14 +194,6 @@ }; }; - timer7: timer@...01400 { - compatible = "st,stm32-timer"; - reg = <0x40001400 0x400>; - interrupts = <55>; - clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM7)>; - status = "disabled"; - }; - timers7: timers@...01400 { #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm/boot/dts/stm32f746.dtsi b/arch/arm/boot/dts/stm32f746.dtsi index 4506eb9..c4d0273 100644 --- a/arch/arm/boot/dts/stm32f746.dtsi +++ b/arch/arm/boot/dts/stm32f746.dtsi @@ -82,22 +82,6 @@ status = "disabled"; }; - timer3: timer@...00400 { - compatible = "st,stm32-timer"; - reg = <0x40000400 0x400>; - interrupts = <29>; - clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM3)>; - status = "disabled"; - }; - - timer4: timer@...00800 { - compatible = "st,stm32-timer"; - reg = <0x40000800 0x400>; - interrupts = <30>; - clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM4)>; - status = "disabled"; - }; - timer5: timer@...00c00 { compatible = "st,stm32-timer"; reg = <0x40000c00 0x400>; @@ -105,22 +89,6 @@ clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM5)>; }; - timer6: timer@...01000 { - compatible = "st,stm32-timer"; - reg = <0x40001000 0x400>; - interrupts = <54>; - clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM6)>; - status = "disabled"; - }; - - timer7: timer@...01400 { - compatible = "st,stm32-timer"; - reg = <0x40001400 0x400>; - interrupts = <55>; - clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM7)>; - status = "disabled"; - }; - rtc: rtc@...02800 { compatible = "st,stm32-rtc"; reg = <0x40002800 0x400>; -- 2.7.4
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