linux-kernel - Re: [patches] [PATCH v8 08/18] irqchip: New RISC-V PLIC Driver

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Message-ID: <20170914110406.nwn2yaqaubmidvph@latitude>
Date:   Thu, 14 Sep 2017 13:04:06 +0200
From:   Jonathan Neuschäfer <j.neuschaefer@....net>
To:     patches@...ups.riscv.org
Cc:     peterz@...radead.org, tglx@...utronix.de, jason@...edaemon.net,
        marc.zyngier@....com, Arnd Bergmann <arnd@...db.de>,
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        boqun.feng@...il.com, oleg@...hat.com, mingo@...hat.com,
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        chris@...is-wilson.co.uk, Jason@...c4.com,
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        linux-kernel@...r.kernel.org, linux-kbuild@...r.kernel.org,
        Palmer Dabbelt <palmer@...belt.com>
Subject: Re: [patches] [PATCH v8 08/18] irqchip: New RISC-V PLIC Driver

Hi,

On Tue, Sep 12, 2017 at 02:57:05PM -0700, Palmer Dabbelt wrote:
> This patch adds a driver for the Platform Level Interrupt Controller
> (PLIC) specified as part of the RISC-V supervisor level ISA manual.
> The PLIC connocts global interrupt sources to the local interrupt

s/connocts/connects/?

> controller on each hart.  A PLIC is present on all RISC-V systems.
> 
> Signed-off-by: Palmer Dabbelt <palmer@...belt.com>
> ---
[...]
> +/*
> + * The PLIC consists of memory-mapped control registers, with a memory map as
> + * follows:

This memory map is mostly still as confusing as before (see my email in
the v7 thread).

> + *
> + * base + 0x000000: Reserved (interrupt source 0 does not exist)
> + * base + 0x000004: Interrupt source 1 priority
> + * base + 0x000008: Interrupt source 2 priority
> + * ...
> + * base + 0x000FFC: Interrupt source 1023 priority
> + * base + 0x001000: Pending 0
> + * base + 0x001FFF: Pending
> + * base + 0x002000: Enable bits for sources 0-31 on context 0
> + * base + 0x002004: Enable bits for sources 32-63 on context 0
> + * ...
> + * base + 0x0020FC: Enable bits for sources 992-1023 on context 0
> + * base + 0x002080: Enable bits for sources 0-31 on context 1
> + * ...
> + * base + 0x002100: Enable bits for sources 0-31 on context 2
> + * ...
> + * base + 0x1F1F80: Enable bits for sources 992-1023 on context 15871
> + * base + 0x1F1F84: Reserved
> + * ...              (higher context IDs would fit here, but wouldn't fit
> + *                   inside the per-context priority vector)
> + * base + 0x1FFFFC: Reserved
> + * base + 0x200000: Priority threshold for context 0
> + * base + 0x200004: Claim/complete for context 0
> + * base + 0x200008: Reserved
> + * ...
> + * base + 0x200FFC: Reserved
> + * base + 0x201000: Priority threshold for context 1
> + * base + 0x201004: Claim/complete for context 1
> + * ...
> + * base + 0xFFE000: Priority threshold for context 15871
> + * base + 0xFFE004: Claim/complete for context 15871
> + * base + 0xFFE008: Reserved
> + * ...
> + * base + 0xFFFFFC: Reserved
> + */


Jonathan Neuschäfer

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