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Message-ID: <20170916052626.GA3704@Asurada>
Date:   Fri, 15 Sep 2017 22:26:28 -0700
From:   Nicolin Chen <nicoleotsuka@...il.com>
To:     Peter De Schrijver <pdeschrijver@...dia.com>
Cc:     linux-kernel@...r.kernel.org, linux-tegra@...r.kernel.org,
        linux-clk@...r.kernel.org, jonathanh@...dia.com,
        thierry.reding@...il.com, sboyd@...eaurora.org,
        mturquette@...libre.com, pgaikwad@...dia.com
Subject: Re: [PATCH] clk: tegra: Use readl_relaxed_poll_timeout_atomic in
 tegra210_clock_init

On Fri, Sep 15, 2017 at 12:31:45PM +0300, Peter De Schrijver wrote:
> Apart from the typo in the commit message (preemption rather than preemtion):

Sent a v2 to correct it. And included your Acked-by.

Thanks

> 
> Acked-By: Peter De Schrijver <pdeschrijver@...dia.com>
> 
> On Thu, Sep 14, 2017 at 06:36:14PM -0700, Nicolin Chen wrote:
> > Below is the call trace of tegra210_init_pllu() function:
> >   start_kernel()
> >   -> time_init()
> >   --> of_clk_init()
> >   ---> tegra210_clock_init()
> >   ----> tegra210_pll_init()
> >   -----> tegra210_init_pllu()
> > 
> > Because the preemtion is disabled in the start_kernel before calling
> > time_init, tegra210_init_pllu is actually in an atomic context while
> > it includes a readl_relaxed_poll_timeout that might sleep.
> > 
> > So this patch just changes this readl_relaxed_poll_timeout() to its
> > atomic version.
> > 
> > Signed-off-by: Nicolin Chen <nicoleotsuka@...il.com>
> > ---
> >  drivers/clk/tegra/clk-tegra210.c | 4 ++--
> >  1 file changed, 2 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/clk/tegra/clk-tegra210.c b/drivers/clk/tegra/clk-tegra210.c
> > index 0b9789a..ea695c4 100644
> > --- a/drivers/clk/tegra/clk-tegra210.c
> > +++ b/drivers/clk/tegra/clk-tegra210.c
> > @@ -2587,8 +2587,8 @@ static int tegra210_enable_pllu(void)
> >  	reg |= PLL_ENABLE;
> >  	writel(reg, clk_base + PLLU_BASE);
> >  
> > -	readl_relaxed_poll_timeout(clk_base + PLLU_BASE, reg,
> > -				   reg & PLL_BASE_LOCK, 2, 1000);
> > +	readl_relaxed_poll_timeout_atomic(clk_base + PLLU_BASE, reg,
> > +					  reg & PLL_BASE_LOCK, 2, 1000);
> >  	if (!(reg & PLL_BASE_LOCK)) {
> >  		pr_err("Timed out waiting for PLL_U to lock\n");
> >  		return -ETIMEDOUT;
> > -- 
> > 2.1.4
> > 

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