lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20170918015353.GA15440@tardis>
Date:   Mon, 18 Sep 2017 15:52:42 +0800
From:   Boqun Feng <boqun.feng@...il.com>
To:     "Paul E. McKenney" <paulmck@...ux.vnet.ibm.com>
Cc:     j.alglave@....ac.uk, luc.maranget@...ia.fr, parri.andrea@...il.com,
        stern@...land.harvard.edu, dhowells@...hat.com,
        peterz@...radead.org, will.deacon@....com, npiggin@...il.com,
        linux-kernel@...r.kernel.org
Subject: Re: Memory-ordering recipes

On Sun, Sep 17, 2017 at 04:05:09PM -0700, Paul E. McKenney wrote:
> Hello!
> 

Hi Paul,

> The topic of memory-ordering recipes came up at the Linux Plumbers
> Conference microconference on Friday, so I thought that I should summarize
> what is currently "out there":
> 
> 1.	memory-barriers.txt:  A bit rambling and diffuse for a recipes
> 	document.
> 
> 2.	https://www.kernel.org/pub/linux/kernel/people/paulmck/LWNLinuxMM/Examples.html
> 	Many of the examples are on-point, but this is aimed more
> 	at understanding the memory model than at an organized set
> 	of recipes.
> 
> 3.	https://www.kernel.org/pub/linux/kernel/people/paulmck/LWNLinuxMM/Examples.html

Duplicate links ;-) This should a link to some slides?

> 	Slides 15-20.  Again, some of the litmus tests are on-point,
> 	but the focus is more on understanding the memory model than on
> 	an organized set of recipes.
> 
> So what litmus tests are needed?  Here is my initial set:
> 
> 1.	Release-acquire chains, AKA ISA2, Z6.2, LB, and 3.LB
> 
> 	Lots of variety here, can in some cases substitute:
> 	
> 	a.	READ_ONCE() for smp_load_acquire()
> 	b.	WRITE_ONCE() for smp_store_release()
> 	c.	Dependencies for both smp_load_acquire() and
> 		smp_store_release().
> 	d.	smp_wmb() for smp_store_release() in first thread
> 		of ISA2 and Z6.2.
> 	e.	smp_rmb() for smp_load_acquire() in last thread of ISA2.
> 
> 2.	MP (see test6.pdf for nickname translation)
> 
> 	a.	smp_store_release() / smp_load_acquire()
> 	b.	rcu_assign_pointer() / rcu_dereference()
> 	c.	smp_wmb() / smp_rmb()
> 	d.	Replacing either of the above with smp_mb()
> 
> 3.	SB
> 
> 	a.	smp_mb(), as in lockless wait-wakeup coordination.
> 		And as in sys_membarrier()-scheduler coordination,
> 		for that matter.

	b.	replace smp_mb() with smp_mb__before_atomic() followed
		by a _relaxed cmpchg? As in pv_kick_node():

		https://marc.info/?l=linux-kernel&m=150274124711012

Besides, do we also want to add Co* into the set? I think there may be
some people still confused to think per-loc SC is not held, and they may
add unnecessary barriers in their code. Those (Co*) recipes could serve
as a guide for state-machine style programming. Thoughts?

Regards,
Boqun

> 
> Others?
> 
> 							Thanx, Paul
> 

Download attachment "signature.asc" of type "application/pgp-signature" (489 bytes)

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ