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Message-ID: <61975ad5-baa2-c10e-4e5e-3bd09c5a53e4@linaro.org>
Date:   Mon, 18 Sep 2017 16:03:52 +0100
From:   Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
To:     Greg Kroah-Hartman <gregkh@...uxfoundation.org>
Cc:     linux-kernel@...r.kernel.org,
        Oleksij Rempel <o.rempel@...gutronix.de>
Subject: Re: [PATCH 2/2] nvmem: add snvs_lpgpr driver



On 18/09/17 15:12, Greg Kroah-Hartman wrote:
> On Sun, Sep 17, 2017 at 12:33:43PM +0200, srinivas.kandagatla@...aro.org wrote:
>> From: Oleksij Rempel <o.rempel@...gutronix.de>
>>
>> This is a driver for Low Power General Purpose Register (LPGPR)
>> available on i.MX6 SoCs in Secure Non-Volatile Storage (SNVS)
>> of this chip.
>>
>> It is a 32-bit read/write register located in the low power domain.
>> Since LPGPR is located in the battery-backed power domain, LPGPR can
>> be used by any application for retaining data during an SoC power-down
>> mode.
>>
>> Signed-off-by: Oleksij Rempel <o.rempel@...gutronix.de>
>> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
>> ---
>>   drivers/nvmem/Kconfig      |  10 +++
>>   drivers/nvmem/Makefile     |   2 +
>>   drivers/nvmem/snvs_lpgpr.c | 156 +++++++++++++++++++++++++++++++++++++++++++++
>>   3 files changed, 168 insertions(+)
>>   create mode 100644 drivers/nvmem/snvs_lpgpr.c
> 
> Too late for 4.14, as -rc1 is already out.  How about for 4.15-rc1?
> 
Would appreciate if its possible to take it as a late one in next 
possible 4.14 rc.
These patches were in the list of long time, I forgot to include this 
in the first set of nvmem patches!

thanks
Srini



> thanks,
> 
> greg k-h
> 

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