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Message-ID: <tencent_27AD421B310F475224638DF3@qq.com>
Date:   Tue, 19 Sep 2017 10:23:45 +0800
From:   "陈华才" <chenhc@...ote.com>
To:     "Christoph Hellwig" <hch@...radead.org>,
        "Robin Murphy" <robin.murphy@....com>
Cc:     "Andrew Morton" <akpm@...ux-foundation.org>,
        "Fuxin Zhang" <zhangfx@...ote.com>,
        "linux-mm" <linux-mm@...ck.org>,
        "linux-kernel" <linux-kernel@...r.kernel.org>,
        "stable" <stable@...r.kernel.org>
Subject: Re: [V5, 2/3] mm: dmapool: Align to ARCH_DMA_MINALIGN innon-coherent DMA mode

Oh, I know, I've make a mistake, dmapool doesn't need to change.

Huacai
 
 
------------------ Original ------------------
From:  "Christoph Hellwig"<hch@...radead.org>;
Date:  Mon, Sep 18, 2017 11:51 PM
To:  "Robin Murphy"<robin.murphy@....com>; 
Cc:  "Huacai Chen"<chenhc@...ote.com>; "Andrew Morton"<akpm@...ux-foundation.org>; "Fuxin Zhang"<zhangfx@...ote.com>; "linux-mm"<linux-mm@...ck.org>; "linux-kernel"<linux-kernel@...r.kernel.org>; "stable"<stable@...r.kernel.org>; 
Subject:  Re: [V5, 2/3] mm: dmapool: Align to ARCH_DMA_MINALIGN innon-coherent DMA mode

 
On Mon, Sep 18, 2017 at 10:44:54AM +0100, Robin Murphy wrote:
> On 18/09/17 05:22, Huacai Chen wrote:
> > In non-coherent DMA mode, kernel uses cache flushing operations to
> > maintain I/O coherency, so the dmapool objects should be aligned to
> > ARCH_DMA_MINALIGN. Otherwise, it will cause data corruption, at least
> > on MIPS:
> > 
> > 	Step 1, dma_map_single
> > 	Step 2, cache_invalidate (no writeback)
> > 	Step 3, dma_from_device
> > 	Step 4, dma_unmap_single
> 
> This is a massive red warning flag for the whole series, because DMA
> pools don't work like that. At best, this will do nothing, and at worst
> it is papering over egregious bugs elsewhere. Streaming mappings of
> coherent allocations means completely broken code.

Oh, I hadn't even seen that part.  Yes, dma coherent (and pool)
allocations must never be used for streaming mappings.  I wish we'd
have some debug infrastructure to warn on such uses.

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