linux-kernel - Re: [v4,0/3] Workaround for bus/slot reset on Cavium cn8xxx root ports

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Message-ID: <20170921080659.GA12818@hc>
Date:   Thu, 21 Sep 2017 10:06:59 +0200
From:   Jan Glauber <jan.glauber@...iumnetworks.com>
To:     Alex Williamson <alex.williamson@...hat.com>
Cc:     Vadim Lomovtsev <Vadim.Lomovtsev@...iumnetworks.com>,
        Bjorn Helgaas <bhelgaas@...gle.com>, kvm@...r.kernel.org,
        linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org,
        Jon Masters <jcm@...hat.com>,
        linux-arm-kernel@...ts.infradead.org, david.daney@...ium.com,
        Robert Richter <robert.richter@...ium.com>
Subject: Re: [v4,0/3] Workaround for bus/slot reset on Cavium cn8xxx root
 ports

On Wed, Sep 20, 2017 at 12:09:12PM -0600, Alex Williamson wrote:
> On Tue, 12 Sep 2017 02:40:49 -0700
> Vadim Lomovtsev <Vadim.Lomovtsev@...iumnetworks.com> wrote:
> 
> > Hi all,
> > 
> > Are there any updates on this ?
> > Comments/objections/acks/nacks ?
> > 
> > WBBR,
> > Vadim
> > 
> > On Fri, Sep 08, 2017 at 10:10:30AM +0200, Jan Glauber wrote:
> > > Using vfio-pci on a combination of cn8xxx and some PCI devices results in
> > > a kernel panic. This is triggered by issuing a bus or a slot reset
> > > on the PCI device.
> > > 
> > > With this series both checks indicate that the reset is not possible
> > > preventing the kernel panic.
> > > 
> > > David Daney (2):
> > >   PCI: Allow PCI_DEV_FLAGS_NO_BUS_RESET to be used on bus device
> > >   PCI: Avoid bus reset for Cavium cn8xxx root ports
> > > 
> > > Jan Glauber (1):
> > >   PCI: Avoid slot reset if bus reset is not possible
> > > 
> > >  drivers/pci/pci.c    | 8 ++++++++
> > >  drivers/pci/quirks.c | 8 ++++++++
> > >  2 files changed, 16 insertions(+)  
> 
> 
> Looks ok to me, for series:
> 
> Reviewed-by: Alex Williamson <alex.williamson@...hat.com>

Thanks for the review. And also for being patient with my iterations.

> I am curious why we're happy targeting this quirk at a single device ID
> while at the same time trying to expand the ACS quirk to a notable
> fraction of the Cavium PCI device ID address space.  Thanks,

David, please correct me if I'm wrong but I think this problem only
exists on cn88xx (device id 0xa100) but not on cn81xx/cn83xx (0xa200,
0xa300). I've seen the bridge causing the problem only on cn88xx.

--Jan