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Message-ID: <20170921142639.GA18211@lst.de>
Date: Thu, 21 Sep 2017 16:26:39 +0200
From: Christoph Hellwig <hch@....de>
To: Robin Murphy <robin.murphy@....com>
Cc: Ganapatrao Kulkarni <ganapatrao.kulkarni@...ium.com>,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
iommu@...ts.linux-foundation.org, linux-mm@...ck.org,
Christoph Hellwig <hch@....de>,
Marek Szyprowski <m.szyprowski@...sung.com>,
Will.Deacon@....com, lorenzo.pieralisi@....com,
hanjun.guo@...aro.org, joro@...tes.org, vbabka@...e.cz,
akpm@...ux-foundation.org, mhocko@...e.com,
Tomasz.Nowicki@...ium.com, Robert.Richter@...ium.com,
jnair@...iumnetworks.com, gklkml16@...il.com
Subject: Re: [PATCH 3/4] iommu/arm-smmu-v3: Use NUMA memory allocations for
stream tables and comamnd queues
On Thu, Sep 21, 2017 at 12:58:04PM +0100, Robin Murphy wrote:
> Christoph, Marek; how reasonable do you think it is to expect
> dma_alloc_coherent() to be inherently NUMA-aware on NUMA-capable
> systems? SWIOTLB looks fairly straightforward to fix up (for the simple
> allocation case; I'm not sure it's even worth it for bounce-buffering),
> but the likes of CMA might be a little trickier...
I think allocating data node local to dev is a good default. I'm not
sure if we'd still need a version that takes an explicit node, though.
On the one hand devices like NVMe or RDMA nics have queues that are
assigned to specific cpus and thus have an inherent affinity to given
nodes. On the other hand we'd still need to access the PCIe device,
so for it to make sense we'd need to access the dma memory a lot more
from the host than from the device, and I'm not sure if we ever have
devices where that is the case (which would not be optimal to start
with).
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