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Message-ID: <20170921231240.tsoapk6zlwcysiud@rob-hp-laptop>
Date: Thu, 21 Sep 2017 18:12:40 -0500
From: Rob Herring <robh@...nel.org>
To: Icenowy Zheng <icenowy@...c.io>
Cc: Srinivas Kandagatla <srinivas.kandagatla@...aro.org>,
Maxime Ripard <maxime.ripard@...e-electrons.com>,
Chen-Yu Tsai <wens@...e.org>, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-sunxi@...glegroups.com
Subject: Re: [PATCH] nvmem: sunxi-sid: add support for A64/H5's SID controller
On Mon, Sep 18, 2017 at 11:42:04PM +0800, Icenowy Zheng wrote:
> Allwinner A64/H5 SoCs come with a SID controller like the one in H3, but
> without the silicon bug that makes the initial value at 0x200 wrong, so
> the value at 0x200 can be directly read.
>
> Add support for this kind of SID controller.
>
> Signed-off-by: Icenowy Zheng <icenowy@...c.io>
> ---
> Documentation/devicetree/bindings/nvmem/allwinner,sunxi-sid.txt | 1 +
> drivers/nvmem/sunxi_sid.c | 6 ++++++
> 2 files changed, 7 insertions(+)
Acked-by: Rob Herring <robh@...nel.org>
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