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Message-ID: <CAPDyKFrGMcU5Q=Y8CPinZfqan1NVP4Be-d96FAdV9nEL=N6ohg@mail.gmail.com>
Date: Fri, 22 Sep 2017 11:45:18 +0200
From: Ulf Hansson <ulf.hansson@...aro.org>
To: Krishna Reddy <vdumpa@...dia.com>
Cc: Adrian Hunter <adrian.hunter@...el.com>,
Thierry Reding <thierry.reding@...il.com>,
Jon Hunter <jonathanh@...dia.com>,
"linux-mmc@...r.kernel.org" <linux-mmc@...r.kernel.org>,
"linux-tegra@...r.kernel.org" <linux-tegra@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] mmc: tegra: Mark 64 bit dma broken on Tegra186
On 8 September 2017 at 21:48, Krishna Reddy <vdumpa@...dia.com> wrote:
> SDHCI controllers on Tegra186 support 40 bit addressing.
> IOVA addresses are 48-bit wide on Tegra186.
> SDHCI host common code sets dma mask as either 32-bit or 64-bit.
> To avoid access issues when SMMU is enabled, disable 64-bit dma.
>
> Signed-off-by: Krishna Reddy <vdumpa@...dia.com>
Thanks, applied for next!
Kind regards
Uffe
> ---
> drivers/mmc/host/sdhci-tegra.c | 10 +++++++++-
> 1 file changed, 9 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c
> index 0cd6fa80db66..b877c13184c2 100644
> --- a/drivers/mmc/host/sdhci-tegra.c
> +++ b/drivers/mmc/host/sdhci-tegra.c
> @@ -422,7 +422,15 @@ static const struct sdhci_pltfm_data sdhci_tegra186_pdata = {
> SDHCI_QUIRK_NO_HISPD_BIT |
> SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC |
> SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN,
> - .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN,
> + .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
> + /* SDHCI controllers on Tegra186 support 40-bit addressing.
> + * IOVA addresses are 48-bit wide on Tegra186.
> + * With 64-bit dma mask used for SDHCI, accesses can
> + * be broken. Disable 64-bit dma, which would fall back
> + * to 32-bit dma mask. Ideally 40-bit dma mask would work,
> + * But it is not supported as of now.
> + */
> + SDHCI_QUIRK2_BROKEN_64_BIT_DMA,
> .ops = &tegra114_sdhci_ops,
> };
>
> --
> 2.1.4
>
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