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Message-ID: <tip-97dca6715d0a058a6af028a3019432740b4a0011@git.kernel.org>
Date: Fri, 22 Sep 2017 09:38:35 -0700
From: tip-bot for Andi Kleen <tipbot@...or.com>
To: linux-tip-commits@...r.kernel.org
Cc: linux-kernel@...r.kernel.org, mingo@...nel.org, hpa@...or.com,
acme@...hat.com, tglx@...utronix.de, ak@...ux.intel.com,
jolsa@...hat.com
Subject: [tip:perf/core] perf vendor events: Add JSON metrics for Sandy
Bridge
Commit-ID: 97dca6715d0a058a6af028a3019432740b4a0011
Gitweb: http://git.kernel.org/tip/97dca6715d0a058a6af028a3019432740b4a0011
Author: Andi Kleen <ak@...ux.intel.com>
AuthorDate: Sun, 23 Jul 2017 21:50:34 -0700
Committer: Arnaldo Carvalho de Melo <acme@...hat.com>
CommitDate: Wed, 13 Sep 2017 09:49:17 -0300
perf vendor events: Add JSON metrics for Sandy Bridge
Add JSON metrics for Sandy Bridge.
Committer testing:
# grep "model name" /proc/cpuinfo | head -1
model name : Intel(R) Core(TM) i5-2400 CPU @ 3.10GHz
# perf list metricgroup
List of pre-defined events (to be used in -e):
Metric Groups:
DSB
FLOPS
Frontend
Frontend_Bandwidth
Pipeline
Ports_Utilization
Power
SMT
Summary
TopDownL1
# perf stat -M Power --metric-only -a sleep 1
Performance counter stats for 'system wide':
Turbo_Utilization C3_Core_Residency C6_Core_Residency C7_Core_Residency C2_Pkg_Residency C3_Pkg_Residency C6_Pkg_Residency C7_Pkg_Residency
0.8 0.0 98.1 0.0 0.0 0.0 23.4 0.0
1.001153658 seconds time elapsed
# perf stat -v -M Power --metric-only -a sleep 1
Using CPUID GenuineIntel-6-2A
metric expr cpu_clk_unhalted.thread / cpu_clk_unhalted.ref_tsc for Turbo_Utilization
found event cpu_clk_unhalted.thread
found event cpu_clk_unhalted.ref_tsc
metric expr (cstate_core@c3\-residency@ / msr@tsc@) * 100 for C3_Core_Residency
found event cstate_core/c3-residency/
found event msr/tsc/
metric expr (cstate_core@c6\-residency@ / msr@tsc@) * 100 for C6_Core_Residency
found event cstate_core/c6-residency/
found event msr/tsc/
metric expr (cstate_core@c7\-residency@ / msr@tsc@) * 100 for C7_Core_Residency
found event cstate_core/c7-residency/
found event msr/tsc/
metric expr (cstate_pkg@c2\-residency@ / msr@tsc@) * 100 for C2_Pkg_Residency
found event cstate_pkg/c2-residency/
found event msr/tsc/
metric expr (cstate_pkg@c3\-residency@ / msr@tsc@) * 100 for C3_Pkg_Residency
found event cstate_pkg/c3-residency/
found event msr/tsc/
metric expr (cstate_pkg@c6\-residency@ / msr@tsc@) * 100 for C6_Pkg_Residency
found event cstate_pkg/c6-residency/
found event msr/tsc/
metric expr (cstate_pkg@c7\-residency@ / msr@tsc@) * 100 for C7_Pkg_Residency
found event cstate_pkg/c7-residency/
found event msr/tsc/
adding {cpu_clk_unhalted.thread,cpu_clk_unhalted.ref_tsc}:W,{cstate_core/c3-residency/,msr/tsc/}:W,{cstate_core/c6-residency/,msr/tsc/}:W,{cstate_core/c7-residency/,msr/tsc/}:W,{cstate_pkg/c2-residency/,msr/tsc/}:W,{cstate_pkg/c3-residency/,msr/tsc/}:W,{cstate_pkg/c6-residency/,msr/tsc/}:W,{cstate_pkg/c7-residency/,msr/tsc/}:W
cpu_clk_unhalted.thread -> cpu/event=0x3c/
cpu_clk_unhalted.ref_tsc -> cpu/umask=0x3,period=2000003,event=0/
Weak group for cstate_pkg/c2-residency//2 failed
Weak group for cstate_pkg/c3-residency//2 failed
Weak group for cstate_pkg/c6-residency//2 failed
Weak group for cstate_pkg/c7-residency//2 failed
cpu_clk_unhalted.thread: 5564185 4002833569 4002833569
cpu_clk_unhalted.ref_tsc: 7325424 4002833569 4002833569
cstate_core/c3-residency/: 68293 4003027101 4003027101
msr/tsc/: 12451294472 4003027101 4003027101
cstate_core/c6-residency/: 12238830163 4003260984 4003260984
msr/tsc/: 12452017806 4003260984 4003260984
cstate_core/c7-residency/: 0 4003489648 4003489648
msr/tsc/: 12452725162 4003489648 4003489648
cstate_pkg/c2-residency/: 1830054 1000913138 1000913138
msr/tsc/: 12453441079 4003717513 4003717513
cstate_pkg/c3-residency/: 0 1000973570 1000973570
msr/tsc/: 12454177865 4003954758 4003954758
cstate_pkg/c6-residency/: 2940448859 1001032370 1001032370
msr/tsc/: 12454833890 4004166118 4004166118
cstate_pkg/c7-residency/: 0 1001049818 1001049818
msr/tsc/: 12454919470 4004194204 4004194204
Performance counter stats for 'system wide':
Turbo_Utilization C3_Core_Residency C6_Core_Residency C7_Core_Residency C2_Pkg_Residency C3_Pkg_Residency C6_Pkg_Residency C7_Pkg_Residency
0.8 0.0 98.3 0.0 0.0 0.0 23.6 0.0
1.001126519 seconds time elapsed
#
Signed-off-by: Andi Kleen <ak@...ux.intel.com>
Tested-by: Arnaldo Carvalho de Melo <acme@...hat.com>
Cc: Jiri Olsa <jolsa@...hat.com>
Link: http://lkml.kernel.org/r/20170905195235.GW2482@two.firstfloor.org
Signed-off-by: Arnaldo Carvalho de Melo <acme@...hat.com>
---
.../snb-metrics.json} | 30 +++-------------------
1 file changed, 3 insertions(+), 27 deletions(-)
diff --git a/tools/perf/pmu-events/arch/x86/skylake/skl-metrics.json b/tools/perf/pmu-events/arch/x86/sandybridge/snb-metrics.json
similarity index 72%
copy from tools/perf/pmu-events/arch/x86/skylake/skl-metrics.json
copy to tools/perf/pmu-events/arch/x86/sandybridge/snb-metrics.json
index 411f941..b35b1c1 100644
--- a/tools/perf/pmu-events/arch/x86/skylake/skl-metrics.json
+++ b/tools/perf/pmu-events/arch/x86/sandybridge/snb-metrics.json
@@ -13,7 +13,7 @@
},
{
"BriefDescription": "Rough Estimation of fraction of fetched lines bytes that were likely consumed by program instructions",
- "MetricExpr": "min( 1 , UOPS_ISSUED.ANY / (UOPS_RETIRED.RETIRE_SLOTS / INST_RETIRED.ANY * 64 * ( ICACHE_64B.IFTAG_HIT + ICACHE_64B.IFTAG_MISS ) / 4.1) )",
+ "MetricExpr": "min( 1 , UOPS_ISSUED.ANY / ( UOPS_RETIRED.RETIRE_SLOTS / INST_RETIRED.ANY * 32 * ( ICACHE.HIT + ICACHE.MISSES ) / 4) )",
"MetricGroup": "Frontend",
"MetricName": "IFetch_Line_Utilization"
},
@@ -55,41 +55,17 @@
},
{
"BriefDescription": "Instruction-Level-Parallelism (average number of uops executed when there is at least 1 uop executed)",
- "MetricExpr": "UOPS_EXECUTED.THREAD / ( UOPS_EXECUTED.CORE_CYCLES_GE_1 / 2) if #SMT_on else UOPS_EXECUTED.CORE_CYCLES_GE_1",
+ "MetricExpr": "UOPS_DISPATCHED.THREAD / ( cpu@...S_DISPATCHED.CORE\\,cmask\\=1@ / 2) if #SMT_on else cpu@...S_DISPATCHED.CORE\\,cmask\\=1@",
"MetricGroup": "Pipeline;Ports_Utilization",
"MetricName": "ILP"
},
{
- "BriefDescription": "Average Branch Address Clear Cost (fraction of cycles)",
- "MetricExpr": "2* ( RS_EVENTS.EMPTY_CYCLES - ICACHE_16B.IFDATA_STALL - ICACHE_64B.IFTAG_STALL ) / RS_EVENTS.EMPTY_END",
- "MetricGroup": "Unknown_Branches",
- "MetricName": "BAClear_Cost"
- },
- {
"BriefDescription": "Core actual clocks when any thread is active on the physical core",
"MetricExpr": "( CPU_CLK_UNHALTED.THREAD_ANY / 2 ) if #SMT_on else CPU_CLK_UNHALTED.THREAD",
"MetricGroup": "SMT",
"MetricName": "CORE_CLKS"
},
{
- "BriefDescription": "Actual Average Latency for L1 data-cache miss demand loads",
- "MetricExpr": "L1D_PEND_MISS.PENDING / ( MEM_LOAD_RETIRED.L1_MISS + MEM_LOAD_RETIRED.FB_HIT )",
- "MetricGroup": "Memory_Bound;Memory_Lat",
- "MetricName": "Load_Miss_Real_Latency"
- },
- {
- "BriefDescription": "Memory-Level-Parallelism (average number of L1 miss demand load when there is at least 1 such miss)",
- "MetricExpr": "L1D_PEND_MISS.PENDING / ( L1D_PEND_MISS.PENDING_CYCLES_ANY / 2) if #SMT_on else L1D_PEND_MISS.PENDING_CYCLES",
- "MetricGroup": "Memory_Bound;Memory_BW",
- "MetricName": "MLP"
- },
- {
- "BriefDescription": "Utilization of the core's Page Walker(s) serving STLB misses triggered by instruction/Load/Store accesses",
- "MetricExpr": "( ITLB_MISSES.WALK_PENDING + DTLB_LOAD_MISSES.WALK_PENDING + DTLB_STORE_MISSES.WALK_PENDING + EPT.WALK_PENDING ) / ( 2 * ( CPU_CLK_UNHALTED.THREAD_ANY / 2 ) if #SMT_on else cycles )",
- "MetricGroup": "TLB",
- "MetricName": "Page_Walks_Utilization"
- },
- {
"BriefDescription": "Average CPU Utilization",
"MetricExpr": "CPU_CLK_UNHALTED.REF_TSC / msr@tsc@",
"MetricGroup": "Summary",
@@ -97,7 +73,7 @@
},
{
"BriefDescription": "Giga Floating Point Operations Per Second",
- "MetricExpr": "( 1*( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2* FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4*( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8* FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE ) / 1000000000 / duration_time",
+ "MetricExpr": "( 1*( FP_COMP_OPS_EXE.SSE_SCALAR_SINGLE + FP_COMP_OPS_EXE.SSE_SCALAR_DOUBLE ) + 2* FP_COMP_OPS_EXE.SSE_PACKED_DOUBLE + 4*( FP_COMP_OPS_EXE.SSE_PACKED_SINGLE + SIMD_FP_256.PACKED_DOUBLE ) + 8* SIMD_FP_256.PACKED_SINGLE ) / 1000000000 / duration_time",
"MetricGroup": "FLOPS;Summary",
"MetricName": "GFLOPs"
},
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