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Message-ID: <fa700cdf-f0b5-779b-4f38-3138a7612cc2@gmail.com>
Date:   Sun, 24 Sep 2017 15:12:37 +0200
From:   Marek Vasut <marek.vasut@...il.com>
To:     Vignesh R <vigneshr@...com>,
        Cyrille Pitchen <cyrille.pitchen@...ev4u.fr>
Cc:     David Woodhouse <dwmw2@...radead.org>,
        Brian Norris <computersforpeace@...il.com>,
        Boris Brezillon <boris.brezillon@...e-electrons.com>,
        Rob Herring <robh+dt@...nel.org>,
        linux-mtd@...ts.infradead.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org,
        linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH v3 5/5] mtd: spi-nor: cadence-quadspi: Add runtime PM
 support

On 09/24/2017 03:08 PM, Vignesh R wrote:
> 
> 
> On 9/24/2017 5:31 PM, Marek Vasut wrote:
>> On 09/24/2017 12:59 PM, Vignesh R wrote:
>>> Add pm_runtime* calls to cadence-quadspi driver. This is required to
>>> switch on QSPI power domain on TI 66AK2G SoC during probe.
>>>
>>> Signed-off-by: Vignesh R <vigneshr@...com>
>>
>> Are you planning to add some more fine-grained PM control later?
> 
> Yes, I will need to add fine-grained PM control at some point. But, for
> now SoC does not really support low power mode or runtime power saving
> option.
> The fact that driver still uses clk_prepare_*() calls to enable/disable
> clocks instead of pm_*() calls makes it a bit tricky though.
> 
> Just figured out I forgot to add cleanup code in error handling path of
> probe(). Will fix that and send a v4.

OK, fine. Cleanups are welcome. The SoCFPGA doesn't do much runtime PM
either, so it's fine for now.

-- 
Best regards,
Marek Vasut

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