linux-kernel - [PATCH v2 7/8] arm64: dts: rockchip: add a grf clk for dw-mipi-dsi

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Date:   Tue, 26 Sep 2017 15:55:22 +0800
From:   Nickey Yang <nickey.yang@...k-chips.com>
To:     mark.yao@...k-chips.com, robh+dt@...nel.org, heiko@...ech.de,
        mark.rutland@....com, airlied@...ux.ie
Cc:     linux-kernel@...r.kernel.org, dri-devel@...ts.freedesktop.org,
        linux-rockchip@...ts.infradead.org, seanpaul@...omium.org,
        briannorris@...omium.org, hl@...k-chips.com, zyw@...k-chips.com,
        bivvy.bi@...k-chips.com, xbl@...k-chips.com,
        nickey.yang@...k-chips.com
Subject: [PATCH v2 7/8] arm64: dts: rockchip: add a grf clk for dw-mipi-dsi

The clk of grf must be enabled before writing grf
register for rk3399.

Signed-off-by: Nickey Yang <nickey.yang@...k-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3399.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 6aa43fd..ab7629c 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1630,8 +1630,8 @@
 		reg = <0x0 0xff960000 0x0 0x8000>;
 		interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH 0>;
 		clocks = <&cru SCLK_DPHY_PLL>, <&cru PCLK_MIPI_DSI0>,
-			 <&cru SCLK_DPHY_TX0_CFG>;
-		clock-names = "ref", "pclk", "phy_cfg";
+			 <&cru SCLK_DPHY_TX0_CFG>, <&cru PCLK_VIO_GRF>;
+		clock-names = "ref", "pclk", "phy_cfg", "grf";
 		power-domains = <&power RK3399_PD_VIO>;
 		rockchip,grf = <&grf>;
 		status = "disabled";
-- 
1.9.1