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Message-Id: <20170926141720.25067-1-mika.westerberg@linux.intel.com>
Date: Tue, 26 Sep 2017 17:17:13 +0300
From: Mika Westerberg <mika.westerberg@...ux.intel.com>
To: Bjorn Helgaas <bhelgaas@...gle.com>
Cc: Ashok Raj <ashok.raj@...el.com>,
Keith Busch <keith.busch@...el.com>,
"Rafael J . Wysocki" <rafael.j.wysocki@...el.com>,
Lukas Wunner <lukas@...ner.de>,
Michael Jamet <michael.jamet@...el.com>,
Yehezkel Bernat <yehezkel.bernat@...el.com>,
Mario.Limonciello@...l.com,
Mika Westerberg <mika.westerberg@...ux.intel.com>,
linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: [PATCH 0/7] PCI: Improvements for native PCIe hotplug
Hi,
Currently when plugging PCIe device using native PCIe hotplug Linux PCI
core tries to allocate bus space and resources so that the newly enumerated
topology barely fits there. Now, if the PCIe topology that was just plugged
in has more PCIe hotplug ports we will run out of bus space and resources
pretty quickly. There is a workaround for this by passing pci=hpbussize=N
in the kernel command line but it runs to the same situation after next
hotplug.
A good example where this is a problem is Thunderbolt where each
Thunderbolt device includes PCIe switch and the topology can be extended up
to 6 chained devices.
Future platforms will move from BIOS assisted (ACPI) hotplug from native
PCIe hotplug because then it is possible to power down PCIe hotplug ports
without confusing the SMI handler which is not necessary when native PCIe
hotplug is used. Also Macs have been using native PCIe hotplug from the
beginning. The upcoming Windows already learned how to handle these complex
PCIe topologies and we will reuse the same knowledge in Linux with this
patch series.
The idea is to distribute available bus space and resources to hotplug PCIe
downstream ports so that the PCIe chain can be extended from those points.
The initial available space is configured by the BIOS to the root port in
question.
This series first teaches the Linux PCI core to distribute available bus
space and resources if PCIe hotplug is used. Then following are fixes for
issues found while testing.
With this series applied I can connect the maximum length Thunderbolt PCIe
chain (6 devices) to a Macbook Pro as can be seen from the 'lspci -t'
output below:
-[0000:00]-+-00.0
+-02.0
+-14.0
+-16.0
+-19.0
+-1c.0-[01]----00.0
+-1c.4-[03-78]----00.0-[04-78]--+-00.0-[05]----00.0
| +-01.0-[07-3f]----00.0-[08-3f]--+-01.0-[09]----00.0
| | \-04.0-[0a-3f]----00.0-[0b-3f]--+-01.0-[0c]----00.0
| | \-04.0-[0d-3f]----00.0-[0e-3f]--+-01.0-[0f]--
| | \-04.0-[10-3f]----00.0-[11-3f]--+-01.0-[12]----00.0
| | \-04.0-[13-3f]----00.0-[14-3f]--+-01.0-[15]----00.0
| | \-04.0-[16-3f]----00.0-[17-3f]----00.0-[18-3f]----00.0
| +-02.0-[06]----00.0
| \-04.0-[40-78]--
+-1d.0-[79-ee]----00.0-[7a-ee]--+-00.0-[7b]----00.0
| +-01.0-[7d-b5]--
| +-02.0-[7c]----00.0
| \-04.0-[b6-ee]--
+-1d.3-[02]----00.0
+-1e.0
+-1e.1
+-1e.3
+-1f.0
+-1f.2
+-1f.3
\-1f.4
Mika Westerberg (7):
PCI: Do not allocate more buses than available in parent
PCI: Introduce pcie_upstream_port()
PCI: Distribute available buses to hotplug capable PCIe downstream ports
PCI: Distribute available resources to hotplug capable PCIe downstream ports
PCI: pciehp: Fix race condition handling surprise link down
PCI: pciehp: Do not clear Presence Detect Changed during initialization
PCI: pciehp: Check that the device is really present before touching it
drivers/pci/hotplug-pci.c | 13 ++-
drivers/pci/hotplug/pciehp_ctrl.c | 7 +-
drivers/pci/hotplug/pciehp_hpc.c | 13 ++-
drivers/pci/hotplug/pciehp_pci.c | 18 +++-
drivers/pci/probe.c | 113 +++++++++++++++++++++----
drivers/pci/setup-bus.c | 169 ++++++++++++++++++++++++++++++++++++++
include/linux/pci.h | 30 ++++++-
7 files changed, 332 insertions(+), 31 deletions(-)
--
2.14.1
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