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Message-ID: <0fd316e9-3584-e9bd-2a8b-e73eaa6a9a48@nvidia.com>
Date:   Wed, 27 Sep 2017 09:34:37 +0100
From:   Jon Hunter <jonathanh@...dia.com>
To:     Dmitry Osipenko <digetx@...il.com>,
        Thierry Reding <thierry.reding@...il.com>,
        Laxman Dewangan <ldewangan@...dia.com>,
        "Peter De Schrijver" <pdeschrijver@...dia.com>,
        Prashant Gaikwad <pgaikwad@...dia.com>,
        Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...eaurora.org>,
        Rob Herring <robh+dt@...nel.org>,
        Vinod Koul <vinod.koul@...el.com>
CC:     <linux-tegra@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <dmaengine@...r.kernel.org>, <linux-clk@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v1 3/5] dt-bindings: Add DT bindings for NVIDIA Tegra AHB
 DMA controller


On 27/09/17 02:57, Dmitry Osipenko wrote:
> On 26.09.2017 17:50, Jon Hunter wrote:
>>
>> On 26/09/17 00:22, Dmitry Osipenko wrote:
>>> Document DT bindings for NVIDIA Tegra AHB DMA controller that presents
>>> on Tegra20/30 SoC's.
>>>
>>> Signed-off-by: Dmitry Osipenko <digetx@...il.com>
>>> ---
>>>  .../bindings/dma/nvidia,tegra20-ahbdma.txt         | 23 ++++++++++++++++++++++
>>>  1 file changed, 23 insertions(+)
>>>  create mode 100644 Documentation/devicetree/bindings/dma/nvidia,tegra20-ahbdma.txt
>>>
>>> diff --git a/Documentation/devicetree/bindings/dma/nvidia,tegra20-ahbdma.txt b/Documentation/devicetree/bindings/dma/nvidia,tegra20-ahbdma.txt
>>> new file mode 100644
>>> index 000000000000..2af9aa76ae11
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/dma/nvidia,tegra20-ahbdma.txt
>>> @@ -0,0 +1,23 @@
>>> +* NVIDIA Tegra AHB DMA controller
>>> +
>>> +Required properties:
>>> +- compatible:	Must be "nvidia,tegra20-ahbdma"
>>> +- reg:		Should contain registers base address and length.
>>> +- interrupts:	Should contain one entry, DMA controller interrupt.
>>> +- clocks:	Should contain one entry, DMA controller clock.
>>> +- resets :	Should contain one entry, DMA controller reset.
>>> +- #dma-cells:	Should be <1>. The cell represents DMA request select value
>>> +		for the peripheral. For more details consult the Tegra TRM's
>>> +		documentation, in particular AHB DMA channel control register
>>> +		REQ_SEL field.
>>
>> What about the TRIG_SEL field? Do we need to handle this here as well?
>>
> 
> Actually, DMA transfer trigger isn't related a hardware description. It's up to
> software to decide what trigger to select. So it shouldn't be in the binding.

I think it could be, if say a board wanted a GPIO to trigger a transfer.

> And I think the same applies to requester... any objections?

Well, the REQ_SEL should definitely be in the binding.

Laxman, Stephen, what are your thoughts on the TRIG_SEL field? Looks
like we never bothered with it for the APB DMA and so maybe no ones uses
this.

Cheers
Jon

-- 
nvpublic

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