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Date:   Wed, 27 Sep 2017 14:29:12 +0530
From:   Manu Gautam <mgautam@...eaurora.org>
To:     Kishon Vijay Abraham I <kishon@...com>
Cc:     Felipe Balbi <balbi@...nel.org>, linux-arm-msm@...r.kernel.org,
        linux-usb@...r.kernel.org, Manu Gautam <mgautam@...eaurora.org>,
        Vivek Gautam <vivek.gautam@...eaurora.org>,
        Varadarajan Narayanan <varada@...eaurora.org>,
        Jaehoon Chung <jh80.chung@...sung.com>,
        Fengguang Wu <fengguang.wu@...el.com>,
        Wei Yongjun <weiyongjun1@...wei.com>,
        linux-kernel@...r.kernel.org (open list:GENERIC PHY FRAMEWORK)
Subject: [PATCH v2 16/17] phy: qcom-qmp: Override lane0_power_present signal in device mode

lane0_power_present signal must be asserted of hardware to
operate properly in SS device mode. On some platforms where VBUS
line is not connected to SS QMP PHY there is SS_PHY_CTRL register
in QSCRATCH wrapper that can be used by software to override VBUS.

Signed-off-by: Manu Gautam <mgautam@...eaurora.org>
---
 drivers/phy/qualcomm/phy-qcom-qmp.c | 38 +++++++++++++++++++++++++++++++++++++
 1 file changed, 38 insertions(+)

diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c b/drivers/phy/qualcomm/phy-qcom-qmp.c
index d4e1436..1403de3 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp.c
@@ -61,6 +61,9 @@
 #define USB3_MODE				BIT(0) /* enables USB3 mode */
 #define DP_MODE					BIT(1) /* enables DP mode */
 
+/* QSCRATCH register bits */
+#define QSCRATCH_SS_PHY_CTRL			0x30
+#define LANE0_PWR_PRESENT			BIT(24)
 
 #define PHY_INIT_COMPLETE_TIMEOUT		1000
 #define POWER_DOWN_DELAY_US_MIN			10
@@ -558,6 +561,7 @@ struct qmp_phy {
  * @dev: device
  * @serdes: iomapped memory space for phy's serdes
  * @dp_com: iomapped memory space for phy's dp_com control block
+ * @qscratch_base: iomapped memory space for qscratch region
  *
  * @clks: array of clocks required by phy
  * @resets: array of resets required by phy
@@ -572,6 +576,7 @@ struct qcom_qmp {
 	struct device *dev;
 	void __iomem *serdes;
 	void __iomem *dp_com;
+	void __iomem *qscratch_base;
 
 	struct clk_bulk_data *clks;
 	struct reset_control **resets;
@@ -582,6 +587,7 @@ struct qcom_qmp {
 
 	struct mutex phy_mutex;
 	int init_count;
+	enum phy_mode mode;
 };
 
 static inline void qphy_setbits(void __iomem *base, u32 offset, u32 val)
@@ -1024,6 +1030,26 @@ static int qcom_qmp_phy_exit(struct phy *phy)
 	return 0;
 }
 
+static int qcom_qmp_phy_set_mode(struct phy *phy, enum phy_mode mode)
+{
+	struct qmp_phy *qphy = phy_get_drvdata(phy);
+	struct qcom_qmp *qmp = qphy->qmp;
+
+	qmp->mode = mode;
+
+	/* Update VBUS override in qscratch register */
+	if (qmp->qscratch_base) {
+		if (mode == PHY_MODE_USB_DEVICE)
+			qphy_setbits(qmp->qscratch_base, QSCRATCH_SS_PHY_CTRL,
+				     LANE0_PWR_PRESENT);
+		else
+			qphy_clrbits(qmp->qscratch_base, QSCRATCH_SS_PHY_CTRL,
+				     LANE0_PWR_PRESENT);
+	}
+
+	return 0;
+}
+
 static int qcom_qmp_phy_vreg_init(struct device *dev)
 {
 	struct qcom_qmp *qmp = dev_get_drvdata(dev);
@@ -1133,6 +1159,7 @@ static int phy_pipe_clk_register(struct qcom_qmp *qmp, struct device_node *np)
 static const struct phy_ops qcom_qmp_phy_gen_ops = {
 	.init		= qcom_qmp_phy_init,
 	.exit		= qcom_qmp_phy_exit,
+	.set_mode	= qcom_qmp_phy_set_mode,
 	.owner		= THIS_MODULE,
 };
 
@@ -1273,7 +1300,18 @@ static int qcom_qmp_phy_probe(struct platform_device *pdev)
 		qmp->dp_com = base;
 	}
 
+	/* Check if platform uses qscratch wrapper */
+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "qscratch");
+	if (res) {
+		/* Can't request region as used by other phy and glue drivers */
+		qmp->qscratch_base = devm_ioremap(dev, res->start,
+						   resource_size(res));
+		if (IS_ERR(qmp->qscratch_base))
+			return PTR_ERR(qmp->qscratch_base);
+	}
+
 	mutex_init(&qmp->phy_mutex);
+	qmp->mode = PHY_MODE_INVALID;
 
 	ret = qcom_qmp_phy_clk_init(dev);
 	if (ret)
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

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