lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <963de773-5501-029b-f9a2-d35a0864394f@codeaurora.org>
Date:   Wed, 27 Sep 2017 11:10:43 -0400
From:   "Leeder, Neil" <nleeder@...eaurora.org>
To:     Will Deacon <will.deacon@....com>
Cc:     nleeder@...eaurora.org, Mark Rutland <mark.rutland@....com>,
        linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        Mark Langsdorf <mlangsdo@...hat.com>,
        Mark Salter <msalter@...hat.com>, Jon Masters <jcm@...hat.com>,
        Timur Tabi <timur@...eaurora.org>,
        Mark Brown <broonie@...nel.org>
Subject: Re: [PATCH] perf: qcom_l2_pmu: add event names

On 9/25/2017 11:08 AM, Will Deacon wrote:
> On Thu, Sep 14, 2017 at 03:30:13PM -0400, Neil Leeder wrote:
>> Add event names so that common events can be
>> specified symbolically, for example:
>>
>> l2cache_0/total-reads/,l2cache_0/cycles/
>>
>> Event names are displayed in 'perf list'.
>>
>> Signed-off-by: Neil Leeder <nleeder@...eaurora.org>
>> ---
>>  drivers/perf/qcom_l2_pmu.c | 54 ++++++++++++++++++++++++++++++++++++++++++++++
>>  1 file changed, 54 insertions(+)
>>
>> diff --git a/drivers/perf/qcom_l2_pmu.c b/drivers/perf/qcom_l2_pmu.c
>> index b242cce..4fdc848 100644
>> --- a/drivers/perf/qcom_l2_pmu.c
>> +++ b/drivers/perf/qcom_l2_pmu.c
>> @@ -92,6 +92,21 @@
>>  
>>  #define reg_idx(reg, i)         (((i) * IA_L2_REG_OFFSET) + reg##_BASE)
>>  
>> +/*
>> + * Events
>> + */
>> +#define L2_EVENT_CYCLES                    0xfe
>> +#define L2_EVENT_DCACHE_OPS                0x400
>> +#define L2_EVENT_ICACHE_OPS                0x401
>> +#define L2_EVENT_TLBI                      0x402
>> +#define L2_EVENT_BARRIERS                  0x403
>> +#define L2_EVENT_TOTAL_READS               0x405
>> +#define L2_EVENT_TOTAL_WRITES              0x406
>> +#define L2_EVENT_TOTAL_REQUESTS            0x407
>> +#define L2_EVENT_LDREX                     0x420
>> +#define L2_EVENT_STREX                     0x421
>> +#define L2_EVENT_CLREX                     0x422
>> +
>>  static DEFINE_RAW_SPINLOCK(l2_access_lock);
>>  
>>  /**
>> @@ -700,9 +715,12 @@ static ssize_t l2_cache_pmu_cpumask_show(struct device *dev,
>>  /* CCG format for perf RAW codes. */
>>  PMU_FORMAT_ATTR(l2_code,   "config:4-11");
>>  PMU_FORMAT_ATTR(l2_group,  "config:0-3");
>> +PMU_FORMAT_ATTR(event,     "config:0-11");
>> +
>>  static struct attribute *l2_cache_pmu_formats[] = {
>>  	&format_attr_l2_code.attr,
>>  	&format_attr_l2_group.attr,
>> +	&format_attr_event.attr,
>>  	NULL,
>>  };
>>  
>> @@ -711,9 +729,45 @@ static ssize_t l2_cache_pmu_cpumask_show(struct device *dev,
>>  	.attrs = l2_cache_pmu_formats,
>>  };
>>  
>> +static ssize_t l2cache_pmu_event_show(struct device *dev,
>> +				      struct device_attribute *attr, char *page)
>> +{
>> +	struct perf_pmu_events_attr *pmu_attr;
>> +
>> +	pmu_attr = container_of(attr, struct perf_pmu_events_attr, attr);
>> +	return sprintf(page, "event=0x%02llx\n", pmu_attr->id);
> 
> Nit: do you want a 0x%03llx here?
> 
> (I'm happy to take the patch either way, so just let me know)
> 
> Will
> 
Thanks Will. I'm leaning toward leaving it the way it is, if it's all the same to you.

Neil
-- 
Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm Technologies Inc.
Qualcomm Technologies, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project.

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ