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Message-ID: <CAKgT0UeAg01Yy189pyzo_wDGYOEX6mBgsr_M9Lsi3u0+a-cW2w@mail.gmail.com>
Date: Wed, 27 Sep 2017 16:06:59 -0700
From: Alexander Duyck <alexander.duyck@...il.com>
To: David Woodhouse <dwmw2@...radead.org>
Cc: Bjorn Helgaas <helgaas@...nel.org>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
linux-pci <linux-pci@...r.kernel.org>,
linux-kernel <linux-kernel@...r.kernel.org>,
Donald Dutile <ddutile@...hat.com>,
Alexander Duyck <alexander.h.duyck@...el.com>,
"Bryant G. Ly" <bryantly@...ux.vnet.ibm.com>,
Bodong Wang <bodong@...lanox.com>,
Alex Williamson <alex.williamson@...hat.com>,
"Michael S. Tsirkin" <mst@...hat.com>, kvm@...r.kernel.org
Subject: Re: [PATCH] uio/uio_pci_generic: Add SR-IOV support
On Wed, Sep 27, 2017 at 3:20 PM, David Woodhouse <dwmw2@...radead.org> wrote:
> On Wed, 2017-09-27 at 17:00 -0500, Bjorn Helgaas wrote:
>>
>>
>> IIUC, this question is basically "why doesn't the PCI core enable IOV
>> automatically when it sees an IOV-capable device?"
>>
>> I think one reason is that an admin might want to control the number
>> of VFs we enable (e.g., via 1789382a72a5 ("PCI: SRIOV control and
>> status via sysfs" [1]). But I guess you already know about that,
>> since this patch uses that sysfs path, so maybe I don't understand
>> your question.
>
>
> I mean, why doesn't the PCI core *allow* SR-IOV to be enabled via
> sysfs, unless the driver does this?
The general idea is that the driver usually has to free up resources
so they can be reassigned to the VF devices.
For example in the case of the Intel NICs enabling SR-IOV reassigns
the queues to the VFs, and the PF has to be aware that this change is
happening so that it doesn't try to make use of queues that then
belong to the VFs.
- Alex
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