linux-kernel - Re: [PATCHv7 09/19] x86/mm: Make MAX_PHYSADDR_BITS and MAX_PHYSMEM

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20170928101736.oqbgmcbi2yp446hc@node.shutemov.name>
Date:   Thu, 28 Sep 2017 13:17:37 +0300
From:   "Kirill A. Shutemov" <kirill@...temov.name>
To:     Ingo Molnar <mingo@...nel.org>
Cc:     "Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>,
        Ingo Molnar <mingo@...hat.com>,
        Linus Torvalds <torvalds@...ux-foundation.org>, x86@...nel.org,
        Thomas Gleixner <tglx@...utronix.de>,
        "H. Peter Anvin" <hpa@...or.com>,
        Andrew Morton <akpm@...ux-foundation.org>,
        Andy Lutomirski <luto@...capital.net>,
        Cyrill Gorcunov <gorcunov@...nvz.org>,
        Borislav Petkov <bp@...e.de>, linux-mm@...ck.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCHv7 09/19] x86/mm: Make MAX_PHYSADDR_BITS and
 MAX_PHYSMEM_BITS dynamic

On Thu, Sep 28, 2017 at 10:25:14AM +0200, Ingo Molnar wrote:
> 
> * Kirill A. Shutemov <kirill.shutemov@...ux.intel.com> wrote:
> 
> > For boot-time switching between paging modes, we need to be able to
> > adjust size of physical address space at runtime.
> > 
> > As part of making physical address space size variable, we have to make
> > X86_5LEVEL dependent on SPARSEMEM_VMEMMAP. !SPARSEMEM_VMEMMAP
> > configuration doesn't work well with variable MAX_PHYSMEM_BITS.
> > 
> > Affect on kernel image size:
> > 
> >    text    data     bss     dec     hex filename
> > 10710340        4880000  860160 16450500         fb03c4 vmlinux.before
> > 10710666        4880000  860160 16450826         fb050a vmlinux.after
> > 
> > Signed-off-by: Kirill A. Shutemov <kirill.shutemov@...ux.intel.com>
> > ---
> >  arch/x86/Kconfig                        | 1 +
> >  arch/x86/include/asm/pgtable_64_types.h | 2 +-
> >  arch/x86/include/asm/sparsemem.h        | 9 ++-------
> >  arch/x86/kernel/setup.c                 | 5 ++---
> >  4 files changed, 6 insertions(+), 11 deletions(-)
> > 
> > diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
> > index 6a15297140ff..f75723d62c25 100644
> > --- a/arch/x86/Kconfig
> > +++ b/arch/x86/Kconfig
> > @@ -1403,6 +1403,7 @@ config X86_PAE
> >  config X86_5LEVEL
> >  	bool "Enable 5-level page tables support"
> >  	depends on X86_64
> > +	depends on SPARSEMEM_VMEMMAP
> 
> Adding a 'depends on' to random kernel internal implementational details, to 
> support new hardware, sucks as an UI, as it will just randomly hide/show the new 
> hardware option if certain magic Kconfig combinations are set.
> 
> Please check how other architectures are doing it. (Hint: they are using select.)
> 
> Also, what is the real dependency here? Why don't the other memory models work, 
> what's the failure mode - won't build, won't boot, or misbehaves in some other 
> way?

I won't build.

For !SPARSEMEM_VMEMMAP SECTIONS_WIDTH depends on MAX_PHYSMEM_BITS:

SECTIONS_WIDTH
  SECTIONS_SHIFT
    MAX_PHYSMEM_BITS

And SECTIONS_WIDTH is used on per-processor stage, it doesn't work if it's
dyncamic. See include/linux/page-flags-layout.h.

-- 
 Kirill A. Shutemov