linux-kernel - Re: [PATCH v4 00/11] dmaengine: sun6i: Fixes for H3/A83T, enable A64

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Date:   Thu, 28 Sep 2017 17:26:46 +0200
From:   Maxime Ripard <maxime.ripard@...e-electrons.com>
To:     Stefan Brüns <stefan.bruens@...h-aachen.de>
Cc:     linux-sunxi@...glegroups.com, devicetree@...r.kernel.org,
        Chen-Yu Tsai <wens@...e.org>,
        Andre Przywara <andre.przywara@....com>,
        linux-kernel@...r.kernel.org,
        Dan Williams <dan.j.williams@...el.com>,
        Vinod Koul <vinod.koul@...el.com>,
        Rob Herring <robh+dt@...nel.org>, dmaengine@...r.kernel.org,
        Code Kipper <codekipper@...il.com>,
        linux-arm-kernel@...ts.infradead.org,
        Catalin Marinas <catalin.marinas@....com>,
        Will Deacon <will.deacon@....com>,
        Mark Rutland <mark.rutland@....com>
Subject: Re: [PATCH v4 00/11] dmaengine: sun6i: Fixes for H3/A83T, enable A64

On Thu, Sep 28, 2017 at 01:49:17AM +0000, Stefan Brüns wrote:
> Commit 3a03ea763a67 ("dmaengine: sun6i: Add support for Allwinner A83T
> (sun8i) variant") and commit f008db8c00c1 ("dmaengine: sun6i: Add support for
> Allwinner H3 (sun8i) variant") added support for the A83T resp. H3, but missed
> some differences between the original A31 and A83T/H3.
> 
> The first patch adds a callback to the controller config to set the clock
> autogating register of different SoC generations, i.e. A31, A23+A83T, H3+later,
> and uses it to for the correct clock autogating setting.
> 
> The second patch adds a callback for the burst length setting in the channel
> config register, which has different field offsets and new burst widths/lengths,
> which differs between H3 and earlier generations
> 
> The third patch restructures some code required for the fourth patch and adds the
> burst lengths to the controller config.
> 
> The fourth patch adds the burst widths to the config and adds the handling of the
> H3 specific burst widths.
> 
> Patch 5 restructures the code to decouple some controller details (e.g. channel
> count) from the compatible string/the config.
> 
> Patches 6, 7 and 8 introduce and use the "dma-chans" property for the A64. Although
> register compatible to the H3, the channel count differs and thus it requires a
> new compatible. To avoid introduction of new compatibles for each minor variation,
> anything but the register model is moved to devicetree properties. There
> is at least one SoC (R40) which can then reuse the A64 compatible, the same
> would have worked for A83T+V3s.
> 
> Patches 9 and 10 add the DMA controller node to the devicetree and add the DMA
> controller reference to the SPI nodes.
> 
> Patch 11 fixes a small error in the devicetree binding example.

Applied patches 9-11, thanks!
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

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