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Message-ID: <063D6719AE5E284EB5DD2968C1650D6DD0084EDC@AcuExch.aculab.com>
Date: Fri, 29 Sep 2017 09:14:26 +0000
From: David Laight <David.Laight@...LAB.COM>
To: 'Andrew Lunn' <andrew@...n.ch>,
"Tristram.Ha@...rochip.com" <Tristram.Ha@...rochip.com>
CC: "muvarov@...il.com" <muvarov@...il.com>,
"pavel@....cz" <pavel@....cz>,
"nathan.leigh.conrad@...il.com" <nathan.leigh.conrad@...il.com>,
"vivien.didelot@...oirfairelinux.com"
<vivien.didelot@...oirfairelinux.com>,
"f.fainelli@...il.com" <f.fainelli@...il.com>,
"netdev@...r.kernel.org" <netdev@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"Woojung.Huh@...rochip.com" <Woojung.Huh@...rochip.com>
Subject: RE: [PATCH RFC 3/5] Add KSZ8795 switch driver
From: Andrew Lunn
> Sent: 28 September 2017 20:34
...
> > There are 34 counters. In normal case using generic bus I/O or PCI to read them
> > is very quick, but the switch is mostly accessed using SPI, or even I2C. As the SPI
> > access is very slow.
>
> How slow is it? The Marvell switches all use MDIO. It is probably a
> bit faster than I2C, but it is a lot slower than MMIO or PCI.
>
> ethtool -S lan0 takes about 25ms.
Is the SPI access software bit-banged?
Doing that with software delays isn't friendly to the rest of the system.
(Hardware guys please note...)
One possibility is to rate-limit the stats reading.
Then an application cannot completely 'hog' the SPI bandwidth.
David
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