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Date: Fri, 29 Sep 2017 08:26:14 +0200 From: Borislav Petkov <bp@...e.de> To: Brijesh Singh <brijesh.singh@....com> Cc: kvm@...r.kernel.org, linux-kernel@...r.kernel.org, x86@...nel.org, Thomas Gleixner <tglx@...utronix.de>, Ingo Molnar <mingo@...hat.com>, "H. Peter Anvin" <hpa@...or.com>, Andy Lutomirski <luto@...nel.org>, Tom Lendacky <thomas.lendacky@....com>, Paolo Bonzini <pbonzini@...hat.com>, Radim Krčmář <rkrcmar@...hat.com> Subject: Re: [Part1 PATCH v5 00/17] x86: Secure Encrypted Virtualization (AMD) On Wed, Sep 27, 2017 at 10:13:12AM -0500, Brijesh Singh wrote: > This part of Secure Encrypted Virtualization (SEV) series focuses on the > changes required in a guest OS for SEV support. ... > This series is based on tip/master commit : a35205980288 (Merge branch 'WIP.x86/fpu'). > > Complete git tree is available: https://github.com/codomania/tip/tree/sev-v5-p1 Ok, so far so good, that part boots: [ 0.000000] AMD Secure Memory Encryption (SME) active :-) -- Regards/Gruss, Boris. SUSE Linux GmbH, GF: Felix Imendörffer, Jane Smithard, Graham Norton, HRB 21284 (AG Nürnberg) --
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