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Message-Id: <1506735951-153728-1-git-send-email-algea.cao@rock-chips.com>
Date:   Sat, 30 Sep 2017 09:45:51 +0800
From:   Algea Cao <algea.cao@...k-chips.com>
To:     daniel.vetter@...el.com, jani.nikula@...ux.intel.com,
        seanpaul@...omium.org, airlied@...ux.ie,
        dri-devel@...ts.freedesktop.org, linux-kernel@...r.kernel.org,
        linux-rockchip@...ts.infradead.org
Cc:     kever.yang@...k-chips.com, mark.yao@...k-chips.com,
        yang.zheng@...k-chips.com, Algea Cao <algea.cao@...k-chips.com>
Subject: [PATCH v2 6/7] drm/rockchip: dw_hdmi: update dw-hdmi encoder enable

Writing grf register according to device type.

Signed-off-by: Algea Cao <algea.cao@...k-chips.com>
---
 drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 19 ++++++++++++++++++-
 1 file changed, 18 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
index e1a9941..b9087af 100644
--- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
@@ -349,9 +349,26 @@ static void dw_hdmi_rockchip_encoder_mode_set(struct drm_encoder *encoder,
 static void dw_hdmi_rockchip_encoder_enable(struct drm_encoder *encoder)
 {
 	struct rockchip_hdmi *hdmi = to_rockchip_hdmi(encoder);
-	u32 val;
+	struct drm_crtc *crtc = encoder->crtc;
+	u32 val, lcdsel_grf_reg, lcdsel_mask;
 	int ret;
 
+	if (WARN_ON(!crtc || !crtc->state))
+		return;
+
+	switch (hdmi->dev_type) {
+	case RK3288_HDMI:
+		lcdsel_grf_reg = RK3288_GRF_SOC_CON6;
+		lcdsel_mask = RK3288_HDMI_LCDC_SEL;
+		break;
+	case RK3399_HDMI:
+		lcdsel_grf_reg = RK3399_GRF_SOC_CON20;
+		lcdsel_mask = RK3399_HDMI_LCDC_SEL;
+		break;
+	default:
+		return;
+	}
+
 	ret = drm_of_encoder_active_endpoint_id(hdmi->dev->of_node, encoder);
 	if (ret)
 		val = hdmi->chip_data->lcdsel_lit;
-- 
2.7.4


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