linux-kernel - RE: [PATCH 02/11] x86: make dma_cache

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Message-ID: <alpine.DEB.2.20.1710032214370.2278@nanos>
Date:   Tue, 3 Oct 2017 22:27:08 +0200 (CEST)
From:   Thomas Gleixner <tglx@...utronix.de>
To:     David Laight <David.Laight@...LAB.COM>
cc:     'Christoph Hellwig' <hch@....de>,
        "iommu@...ts.linux-foundation.org" <iommu@...ts.linux-foundation.org>,
        Chris Zankel <chris@...kel.net>,
        Michal Simek <monstr@...str.eu>,
        "linux-ia64@...r.kernel.org" <linux-ia64@...r.kernel.org>,
        "linux-mips@...ux-mips.org" <linux-mips@...ux-mips.org>,
        "linux-sh@...r.kernel.org" <linux-sh@...r.kernel.org>,
        "linuxppc-dev@...ts.ozlabs.org" <linuxppc-dev@...ts.ozlabs.org>,
        "linux-xtensa@...ux-xtensa.org" <linux-xtensa@...ux-xtensa.org>,
        "x86@...nel.org" <x86@...nel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        David Howells <dhowells@...hat.com>,
        Max Filippov <jcmvbkbc@...il.com>,
        Guan Xuetao <gxt@...c.pku.edu.cn>,
        Robin Murphy <robin.murphy@....com>,
        Marek Szyprowski <m.szyprowski@...sung.com>
Subject: RE: [PATCH 02/11] x86: make dma_cache_sync a no-op

On Tue, 3 Oct 2017, David Laight wrote:

> From: Christoph Hellwig
> > Sent: 03 October 2017 11:43
> > x86 does not implement DMA_ATTR_NON_CONSISTENT allocations, so it doesn't
> > make any sense to do any work in dma_cache_sync given that it must be a
> > no-op when dma_alloc_attrs returns coherent memory.
> 
> I believe it is just about possible to require an explicit
> write flush on x86.
> ISTR this can happen with something like write combining.

As the changelog says: x86 only implements dma_alloc_coherent() which as
the name says returns coherent memory, i.e. type WB (write back), which is
not subject to dma_cache_sync() operations.

If the driver converts that memory to WC (write combine) on its own via
PAT/MTRR, then it needs to take care of flushing the write buffer on its
own. It's not convered by this interface.

Thanks,

	tglx