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Date: Wed, 4 Oct 2017 17:19:16 +1030
From: Joel Stanley <joel@....id.au>
To: Joel Stanley <joel@....id.au>, Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>
Cc: Russell King <linux@...linux.org.uk>, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
Andrew Jeffery <andrew@...id.au>,
Rick Altherr <raltherr@...gle.com>,
Brendan Higgins <brendanhiggins@...gle.com>,
Cédric Le Goater <clg@...d.org>,
linux-aspeed@...ts.ozlabs.org
Subject: [PATCH v2 8/9] ARM: dts: aspeed: Correctly order UART nodes
Order them all by address.
Signed-off-by: Joel Stanley <joel@....id.au>
---
arch/arm/boot/dts/aspeed-g4.dtsi | 48 +++++++++++++++----------------
arch/arm/boot/dts/aspeed-g5.dtsi | 61 ++++++++++++++++++++--------------------
2 files changed, 54 insertions(+), 55 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi
index a549413bda3f..4125e07f22f9 100644
--- a/arch/arm/boot/dts/aspeed-g4.dtsi
+++ b/arch/arm/boot/dts/aspeed-g4.dtsi
@@ -183,6 +183,27 @@
clock-names = "PCLK";
};
+ uart1: serial@...83000 {
+ compatible = "ns16550a";
+ reg = <0x1e783000 0x1000>;
+ reg-shift = <2>;
+ interrupts = <9>;
+ clocks = <&clk_uart>;
+ no-loopback-test;
+ status = "disabled";
+ };
+
+ uart5: serial@...84000 {
+ compatible = "ns16550a";
+ reg = <0x1e784000 0x1000>;
+ reg-shift = <2>;
+ interrupts = <10>;
+ clocks = <&clk_uart>;
+ current-speed = <38400>;
+ no-loopback-test;
+ status = "disabled";
+ };
+
wdt1: wdt@...85000 {
compatible = "aspeed,ast2400-wdt";
reg = <0x1e785000 0x1c>;
@@ -197,11 +218,11 @@
status = "disabled";
};
- uart1: serial@...83000 {
+ uart6: serial@...87000 {
compatible = "ns16550a";
- reg = <0x1e783000 0x1000>;
+ reg = <0x1e787000 0x1000>;
reg-shift = <2>;
- interrupts = <9>;
+ interrupts = <10>;
clocks = <&clk_uart>;
no-loopback-test;
status = "disabled";
@@ -237,27 +258,6 @@
status = "disabled";
};
- uart5: serial@...84000 {
- compatible = "ns16550a";
- reg = <0x1e784000 0x1000>;
- reg-shift = <2>;
- interrupts = <10>;
- clocks = <&clk_uart>;
- current-speed = <38400>;
- no-loopback-test;
- status = "disabled";
- };
-
- uart6: serial@...87000 {
- compatible = "ns16550a";
- reg = <0x1e787000 0x1000>;
- reg-shift = <2>;
- interrupts = <10>;
- clocks = <&clk_uart>;
- no-loopback-test;
- status = "disabled";
- };
-
i2c: i2c@...8a000 {
compatible = "simple-bus";
#address-cells = <1>;
diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
index de2dafa71651..61cc2d25143a 100644
--- a/arch/arm/boot/dts/aspeed-g5.dtsi
+++ b/arch/arm/boot/dts/aspeed-g5.dtsi
@@ -227,6 +227,26 @@
clock-names = "PCLK";
};
+ uart1: serial@...83000 {
+ compatible = "ns16550a";
+ reg = <0x1e783000 0x1000>;
+ reg-shift = <2>;
+ interrupts = <9>;
+ clocks = <&clk_uart>;
+ no-loopback-test;
+ status = "disabled";
+ };
+
+ uart5: serial@...84000 {
+ compatible = "ns16550a";
+ reg = <0x1e784000 0x1000>;
+ reg-shift = <2>;
+ interrupts = <10>;
+ clocks = <&clk_uart>;
+ current-speed = <38400>;
+ no-loopback-test;
+ status = "disabled";
+ };
wdt1: wdt@...85000 {
compatible = "aspeed,ast2500-wdt";
@@ -247,16 +267,6 @@
status = "disabled";
};
- uart1: serial@...83000 {
- compatible = "ns16550a";
- reg = <0x1e783000 0x1000>;
- reg-shift = <2>;
- interrupts = <9>;
- clocks = <&clk_uart>;
- no-loopback-test;
- status = "disabled";
- };
-
lpc: lpc@...89000 {
compatible = "aspeed,ast2500-lpc", "simple-mfd";
reg = <0x1e789000 0x1000>;
@@ -287,6 +297,16 @@
};
};
+ uart6: serial@...87000 {
+ compatible = "ns16550a";
+ reg = <0x1e787000 0x1000>;
+ reg-shift = <2>;
+ interrupts = <10>;
+ clocks = <&clk_uart>;
+ no-loopback-test;
+ status = "disabled";
+ };
+
uart2: serial@...8d000 {
compatible = "ns16550a";
reg = <0x1e78d000 0x1000>;
@@ -317,27 +337,6 @@
status = "disabled";
};
- uart5: serial@...84000 {
- compatible = "ns16550a";
- reg = <0x1e784000 0x1000>;
- reg-shift = <2>;
- interrupts = <10>;
- clocks = <&clk_uart>;
- current-speed = <38400>;
- no-loopback-test;
- status = "disabled";
- };
-
- uart6: serial@...87000 {
- compatible = "ns16550a";
- reg = <0x1e787000 0x1000>;
- reg-shift = <2>;
- interrupts = <10>;
- clocks = <&clk_uart>;
- no-loopback-test;
- status = "disabled";
- };
-
i2c: i2c@...8a000 {
compatible = "simple-bus";
#address-cells = <1>;
--
2.14.1
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