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Message-ID: <1879535.2f3c0LOipO@phil>
Date: Sat, 07 Oct 2017 20:50:37 +0200
From: Heiko Stuebner <heiko@...ech.de>
To: Linus Walleij <linus.walleij@...aro.org>
Cc: David Wu <david.wu@...k-chips.com>,
Tao Huang <huangtao@...k-chips.com>,
Andy Yan <andy.yan@...k-chips.com>,
"open list:ARM/Rockchip SoC..." <linux-rockchip@...ts.infradead.org>,
"linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 2/2] pinctrl: rockchip: Fix the correct routing config for the gmac-m1 pins of rmii and rgmii
Hi Linus,
Am Samstag, 7. Oktober 2017, 12:32:51 CEST schrieb Linus Walleij:
> On Sat, Sep 30, 2017 at 5:07 PM, Heiko Stuebner <heiko@...ech.de> wrote:
> > Am Samstag, 30. September 2017, 20:13:21 CEST schrieb David Wu:
> >> If the gmac-m1 optimization(bit10) is selected, the gpio function
> >> of gmac pins is not valid. We may use the rmii mode for gmac interface,
> >> the pins such as rx_d2, rx_d3, which the rgmii mode used, but rmii not
> >> used could be taken as gpio function. So gmac_rxd0m1 selects the bit2,
> >> and gmac_rxd0m3 select bit10 is more correct.
> >>
> >> Signed-off-by: David Wu <david.wu@...k-chips.com>
> >
> > the patch subject should mention the the rk3328 whose routing gets fixed
> > (like adding a simple "on rk3328" to it), otherwise
> >
> > Reviewed-by: Heiko Stuebner <heiko@...ech.de>
>
> I added rk3328 to it, also assumed this Reviewed-by covers patch 1/2
> as well and applied both with your tag.
while I did mean to cross-check patch 1/2 separately with the soc manual,
I got sidetracked with my current vacation :-) . Anyway, it did look ok on
first glance then and I also cannot find issues with it now. So all is good.
Heiko
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