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Message-Id: <1507531597-25947-1-git-send-email-anju@linux.vnet.ibm.com>
Date: Mon, 9 Oct 2017 12:16:37 +0530
From: Anju T Sudhakar <anju@...ux.vnet.ibm.com>
To: mpe@...erman.id.au
Cc: linuxppc-dev@...ts.ozlabs.org, linux-kernel@...r.kernel.org,
maddy@...ux.vnet.ibm.com, hemant@...ux.vnet.ibm.com,
anju@...ux.vnet.ibm.com
Subject: [PATCH] powerpc/powernv: Add kernel cmdline parameter to disable imc
Add a kernel command line parameter option to disable In-Memory Collection
(IMC) counters and add documentation. This helps in debug.
Signed-off-by: Anju T Sudhakar <anju@...ux.vnet.ibm.com>
Reviewed-By: Madhavan Srinivasan <maddy@...ux.vnet.ibm.com>
---
Documentation/admin-guide/kernel-parameters.txt | 7 +++++
arch/powerpc/platforms/powernv/opal-imc.c | 35 +++++++++++++++++++++++++
2 files changed, 42 insertions(+)
diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
index 0549662..06a8da1 100644
--- a/Documentation/admin-guide/kernel-parameters.txt
+++ b/Documentation/admin-guide/kernel-parameters.txt
@@ -820,6 +820,13 @@
disable_ipv6= [IPV6]
See Documentation/networking/ipv6.txt.
+ disable_imc= [PPC]
+ Format {nest | core | all}
+ Disable imc counters during boot.
+ nest----- Disable nest-imc counters.
+ core----- Disable core and thread imc counters.
+ all------ Disable nest, core and thread imc counters.
+
disable_mtrr_cleanup [X86]
The kernel tries to adjust MTRR layout from continuous
to discrete, to make X server driver able to add WB
diff --git a/arch/powerpc/platforms/powernv/opal-imc.c b/arch/powerpc/platforms/powernv/opal-imc.c
index 21f6531..e929f33 100644
--- a/arch/powerpc/platforms/powernv/opal-imc.c
+++ b/arch/powerpc/platforms/powernv/opal-imc.c
@@ -22,6 +22,28 @@
#include <asm/imc-pmu.h>
#include <asm/cputhreads.h>
+static bool disable_nest_imc;
+static bool disable_core_imc;
+
+/*
+ * diasble_imc=nest: skip the registration of nest pmus.
+ * disable_imc=core: skip the registration of core and thread pmus.
+ * disable_imc=all : disables nest, core and thread.
+ */
+static int __init disable_imc_counters(char *p)
+{
+ if (strncmp(p, "nest", 4) == 0)
+ disable_nest_imc = true;
+ else if (strncmp(p, "core", 4) == 0)
+ disable_core_imc = true;
+ else if (strncmp(p, "all", 3) == 0) {
+ disable_nest_imc = true;
+ disable_core_imc = true;
+ }
+ return 0;
+}
+early_param("disable_imc", disable_imc_counters);
+
/*
* imc_get_mem_addr_nest: Function to get nest counter memory region
* for each chip
@@ -169,6 +191,10 @@ static int opal_imc_counters_probe(struct platform_device *pdev)
return -ENODEV;
}
+ /* If kernel is booted with disable_imc parameters, then return */
+ if (disable_nest_imc && disable_core_imc)
+ return -ENODEV;
+
for_each_compatible_node(imc_dev, NULL, IMC_DTB_UNIT_COMPAT) {
if (of_property_read_u32(imc_dev, "type", &type)) {
pr_warn("IMC Device without type property\n");
@@ -177,12 +203,21 @@ static int opal_imc_counters_probe(struct platform_device *pdev)
switch (type) {
case IMC_TYPE_CHIP:
+ if (disable_nest_imc)
+ continue;
+
domain = IMC_DOMAIN_NEST;
break;
case IMC_TYPE_CORE:
+ if (disable_core_imc)
+ continue;
+
domain =IMC_DOMAIN_CORE;
break;
case IMC_TYPE_THREAD:
+ if (disable_core_imc)
+ continue;
+
domain = IMC_DOMAIN_THREAD;
break;
default:
--
2.7.4
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